tests/mir-opt/inline/inline_instruction_set.t32.Inline.diff

- // MIR for `t32` before Inline
+ // MIR for `t32` after Inline
  
  fn t32() -> () {
      let mut _0: ();
      let _1: ();
      let _2: ();
      let _3: ();
      let _4: ();
+     scope 1 (inlined instruction_set_t32) {
+     }
+     scope 2 (inlined instruction_set_default) {
+     }
  
      bb0: {
          StorageLive(_1);
          _1 = instruction_set_a32() -> [return: bb1, unwind unreachable];
      }
  
      bb1: {
          StorageDead(_1);
          StorageLive(_2);
-         _2 = instruction_set_t32() -> [return: bb2, unwind unreachable];
-     }
- 
-     bb2: {
          StorageDead(_2);
          StorageLive(_3);
-         _3 = instruction_set_default() -> [return: bb3, unwind unreachable];
-     }
- 
-     bb3: {
          StorageDead(_3);
          StorageLive(_4);
-         _4 = inline_always_and_using_inline_asm() -> [return: bb4, unwind unreachable];
+         _4 = inline_always_and_using_inline_asm() -> [return: bb2, unwind unreachable];
      }
  
-     bb4: {
+     bb2: {
          StorageDead(_4);
          _0 = const ();
          return;
      }
  }