| // All these translations used to be automatically generated in the past. However, since they never |
| // changed, we decided to simplify the translation generation script to move them directly into this |
| // file. |
| // |
| // So in short: avoid editing this file. |
| |
| pub(crate) enum ArchCheckResult { |
| Ok(&'static str), |
| UnknownIntrinsic, |
| UnknownArch, |
| } |
| |
| pub(crate) fn old_archs(arch: &str, name: &str) -> ArchCheckResult { |
| ArchCheckResult::Ok(match arch { |
| "AMDGPU" => match name { |
| "div.fixup.f32" => "__builtin_amdgpu_div_fixup", |
| "div.fixup.f64" => "__builtin_amdgpu_div_fixup", |
| "div.fixup.v2f64" => "__builtin_amdgpu_div_fixup", |
| "div.fixup.v4f32" => "__builtin_amdgpu_div_fixup", |
| "div.fmas.f32" => "__builtin_amdgpu_div_fmas", |
| "div.fmas.f64" => "__builtin_amdgpu_div_fmas", |
| "div.fmas.v2f64" => "__builtin_amdgpu_div_fmas", |
| "div.fmas.v4f32" => "__builtin_amdgpu_div_fmas", |
| "ldexp.f32" => "__builtin_amdgpu_ldexp", |
| "ldexp.f64" => "__builtin_amdgpu_ldexp", |
| "ldexp.v2f64" => "__builtin_amdgpu_ldexp", |
| "ldexp.v4f32" => "__builtin_amdgpu_ldexp", |
| "rcp.f32" => "__builtin_amdgpu_rcp", |
| "rcp.f64" => "__builtin_amdgpu_rcp", |
| "rcp.v2f64" => "__builtin_amdgpu_rcp", |
| "rcp.v4f32" => "__builtin_amdgpu_rcp", |
| "rsq.clamped.f32" => "__builtin_amdgpu_rsq_clamped", |
| "rsq.clamped.f64" => "__builtin_amdgpu_rsq_clamped", |
| "rsq.clamped.v2f64" => "__builtin_amdgpu_rsq_clamped", |
| "rsq.clamped.v4f32" => "__builtin_amdgpu_rsq_clamped", |
| "rsq.f32" => "__builtin_amdgpu_rsq", |
| "rsq.f64" => "__builtin_amdgpu_rsq", |
| "rsq.v2f64" => "__builtin_amdgpu_rsq", |
| "rsq.v4f32" => "__builtin_amdgpu_rsq", |
| "trig.preop.f32" => "__builtin_amdgpu_trig_preop", |
| "trig.preop.f64" => "__builtin_amdgpu_trig_preop", |
| "trig.preop.v2f64" => "__builtin_amdgpu_trig_preop", |
| "trig.preop.v4f32" => "__builtin_amdgpu_trig_preop", |
| _ => return ArchCheckResult::UnknownIntrinsic, |
| }, |
| "arm" => match name { |
| "mcrr" => "__builtin_arm_mcrr", |
| "mcrr2" => "__builtin_arm_mcrr2", |
| "thread.pointer" => "__builtin_thread_pointer", |
| _ => return ArchCheckResult::UnknownIntrinsic, |
| }, |
| "cuda" => match name { |
| "syncthreads" => "__syncthreads", |
| _ => return ArchCheckResult::UnknownIntrinsic, |
| }, |
| "hexagon" => match name { |
| "F2.dffixupd" => "__builtin_HEXAGON_F2_dffixupd", |
| "F2.dffixupn" => "__builtin_HEXAGON_F2_dffixupn", |
| "F2.dffixupr" => "__builtin_HEXAGON_F2_dffixupr", |
| "F2.dffma" => "__builtin_HEXAGON_F2_dffma", |
| "F2.dffma.lib" => "__builtin_HEXAGON_F2_dffma_lib", |
| "F2.dffma.sc" => "__builtin_HEXAGON_F2_dffma_sc", |
| "F2.dffms" => "__builtin_HEXAGON_F2_dffms", |
| "F2.dffms.lib" => "__builtin_HEXAGON_F2_dffms_lib", |
| "F2.dfmpy" => "__builtin_HEXAGON_F2_dfmpy", |
| "S2.cabacencbin" => "__builtin_HEXAGON_S2_cabacencbin", |
| "SI.to.SXTHI.asrh" => "__builtin_SI_to_SXTHI_asrh", |
| "V6.vlutb" => "__builtin_HEXAGON_V6_vlutb", |
| "V6.vlutb.128B" => "__builtin_HEXAGON_V6_vlutb_128B", |
| "V6.vlutb.acc" => "__builtin_HEXAGON_V6_vlutb_acc", |
| "V6.vlutb.acc.128B" => "__builtin_HEXAGON_V6_vlutb_acc_128B", |
| "V6.vlutb.dv" => "__builtin_HEXAGON_V6_vlutb_dv", |
| "V6.vlutb.dv.128B" => "__builtin_HEXAGON_V6_vlutb_dv_128B", |
| "V6.vlutb.dv.acc" => "__builtin_HEXAGON_V6_vlutb_dv_acc", |
| "V6.vlutb.dv.acc.128B" => "__builtin_HEXAGON_V6_vlutb_dv_acc_128B", |
| "brev.ldb" => "__builtin_brev_ldb", |
| "brev.ldd" => "__builtin_brev_ldd", |
| "brev.ldh" => "__builtin_brev_ldh", |
| "brev.ldub" => "__builtin_brev_ldub", |
| "brev.lduh" => "__builtin_brev_lduh", |
| "brev.ldw" => "__builtin_brev_ldw", |
| "brev.stb" => "__builtin_brev_stb", |
| "brev.std" => "__builtin_brev_std", |
| "brev.sth" => "__builtin_brev_sth", |
| "brev.sthhi" => "__builtin_brev_sthhi", |
| "brev.stw" => "__builtin_brev_stw", |
| "mm256i.vaddw" => "__builtin__mm256i_vaddw", |
| _ => return ArchCheckResult::UnknownIntrinsic, |
| }, |
| "nvvm" => match name { |
| "abs.i" => "__nvvm_abs_i", |
| "abs.ll" => "__nvvm_abs_ll", |
| "bar.sync" => "__nvvm_bar_sync", |
| "barrier0" => "__nvvm_bar0", |
| "bitcast.d2ll" => "__nvvm_bitcast_d2ll", |
| "bitcast.f2i" => "__nvvm_bitcast_f2i", |
| "bitcast.i2f" => "__nvvm_bitcast_i2f", |
| "bitcast.ll2d" => "__nvvm_bitcast_ll2d", |
| "brev32" => "__nvvm_brev32", |
| "brev64" => "__nvvm_brev64", |
| "clz.i" => "__nvvm_clz_i", |
| "clz.ll" => "__nvvm_clz_ll", |
| "ex2.approx.d" => "__nvvm_ex2_approx_d", |
| "ex2.approx.f" => "__nvvm_ex2_approx_f", |
| "ex2.approx.ftz.f" => "__nvvm_ex2_approx_ftz_f", |
| "fabs.d" => "__nvvm_fabs_d", |
| "fabs.f" => "__nvvm_fabs_f", |
| "fabs.ftz.f" => "__nvvm_fabs_ftz_f", |
| "h2f" => "__nvvm_h2f", |
| "max.i" => "__nvvm_max_i", |
| "max.ll" => "__nvvm_max_ll", |
| "max.ui" => "__nvvm_max_ui", |
| "max.ull" => "__nvvm_max_ull", |
| "min.i" => "__nvvm_min_i", |
| "min.ll" => "__nvvm_min_ll", |
| "min.ui" => "__nvvm_min_ui", |
| "min.ull" => "__nvvm_min_ull", |
| "popc.i" => "__nvvm_popc_i", |
| "popc.ll" => "__nvvm_popc_ll", |
| "rotate.b32" => "__nvvm_rotate_b32", |
| "rotate.b64" => "__nvvm_rotate_b64", |
| "rotate.right.b64" => "__nvvm_rotate_right_b64", |
| "swap.lo.hi.b64" => "__nvvm_swap_lo_hi_b64", |
| _ => return ArchCheckResult::UnknownIntrinsic, |
| }, |
| "ppc" => match name { |
| "qpx.qvfabs" => "__builtin_qpx_qvfabs", |
| "qpx.qvfadd" => "__builtin_qpx_qvfadd", |
| "qpx.qvfadds" => "__builtin_qpx_qvfadds", |
| "qpx.qvfcfid" => "__builtin_qpx_qvfcfid", |
| "qpx.qvfcfids" => "__builtin_qpx_qvfcfids", |
| "qpx.qvfcfidu" => "__builtin_qpx_qvfcfidu", |
| "qpx.qvfcfidus" => "__builtin_qpx_qvfcfidus", |
| "qpx.qvfcmpeq" => "__builtin_qpx_qvfcmpeq", |
| "qpx.qvfcmpgt" => "__builtin_qpx_qvfcmpgt", |
| "qpx.qvfcmplt" => "__builtin_qpx_qvfcmplt", |
| "qpx.qvfcpsgn" => "__builtin_qpx_qvfcpsgn", |
| "qpx.qvfctid" => "__builtin_qpx_qvfctid", |
| "qpx.qvfctidu" => "__builtin_qpx_qvfctidu", |
| "qpx.qvfctiduz" => "__builtin_qpx_qvfctiduz", |
| "qpx.qvfctidz" => "__builtin_qpx_qvfctidz", |
| "qpx.qvfctiw" => "__builtin_qpx_qvfctiw", |
| "qpx.qvfctiwu" => "__builtin_qpx_qvfctiwu", |
| "qpx.qvfctiwuz" => "__builtin_qpx_qvfctiwuz", |
| "qpx.qvfctiwz" => "__builtin_qpx_qvfctiwz", |
| "qpx.qvflogical" => "__builtin_qpx_qvflogical", |
| "qpx.qvfmadd" => "__builtin_qpx_qvfmadd", |
| "qpx.qvfmadds" => "__builtin_qpx_qvfmadds", |
| "qpx.qvfmsub" => "__builtin_qpx_qvfmsub", |
| "qpx.qvfmsubs" => "__builtin_qpx_qvfmsubs", |
| "qpx.qvfmul" => "__builtin_qpx_qvfmul", |
| "qpx.qvfmuls" => "__builtin_qpx_qvfmuls", |
| "qpx.qvfnabs" => "__builtin_qpx_qvfnabs", |
| "qpx.qvfneg" => "__builtin_qpx_qvfneg", |
| "qpx.qvfnmadd" => "__builtin_qpx_qvfnmadd", |
| "qpx.qvfnmadds" => "__builtin_qpx_qvfnmadds", |
| "qpx.qvfnmsub" => "__builtin_qpx_qvfnmsub", |
| "qpx.qvfnmsubs" => "__builtin_qpx_qvfnmsubs", |
| "qpx.qvfperm" => "__builtin_qpx_qvfperm", |
| "qpx.qvfre" => "__builtin_qpx_qvfre", |
| "qpx.qvfres" => "__builtin_qpx_qvfres", |
| "qpx.qvfrim" => "__builtin_qpx_qvfrim", |
| "qpx.qvfrin" => "__builtin_qpx_qvfrin", |
| "qpx.qvfrip" => "__builtin_qpx_qvfrip", |
| "qpx.qvfriz" => "__builtin_qpx_qvfriz", |
| "qpx.qvfrsp" => "__builtin_qpx_qvfrsp", |
| "qpx.qvfrsqrte" => "__builtin_qpx_qvfrsqrte", |
| "qpx.qvfrsqrtes" => "__builtin_qpx_qvfrsqrtes", |
| "qpx.qvfsel" => "__builtin_qpx_qvfsel", |
| "qpx.qvfsub" => "__builtin_qpx_qvfsub", |
| "qpx.qvfsubs" => "__builtin_qpx_qvfsubs", |
| "qpx.qvftstnan" => "__builtin_qpx_qvftstnan", |
| "qpx.qvfxmadd" => "__builtin_qpx_qvfxmadd", |
| "qpx.qvfxmadds" => "__builtin_qpx_qvfxmadds", |
| "qpx.qvfxmul" => "__builtin_qpx_qvfxmul", |
| "qpx.qvfxmuls" => "__builtin_qpx_qvfxmuls", |
| "qpx.qvfxxcpnmadd" => "__builtin_qpx_qvfxxcpnmadd", |
| "qpx.qvfxxcpnmadds" => "__builtin_qpx_qvfxxcpnmadds", |
| "qpx.qvfxxmadd" => "__builtin_qpx_qvfxxmadd", |
| "qpx.qvfxxmadds" => "__builtin_qpx_qvfxxmadds", |
| "qpx.qvfxxnpmadd" => "__builtin_qpx_qvfxxnpmadd", |
| "qpx.qvfxxnpmadds" => "__builtin_qpx_qvfxxnpmadds", |
| "qpx.qvgpci" => "__builtin_qpx_qvgpci", |
| "qpx.qvlfcd" => "__builtin_qpx_qvlfcd", |
| "qpx.qvlfcda" => "__builtin_qpx_qvlfcda", |
| "qpx.qvlfcs" => "__builtin_qpx_qvlfcs", |
| "qpx.qvlfcsa" => "__builtin_qpx_qvlfcsa", |
| "qpx.qvlfd" => "__builtin_qpx_qvlfd", |
| "qpx.qvlfda" => "__builtin_qpx_qvlfda", |
| "qpx.qvlfiwa" => "__builtin_qpx_qvlfiwa", |
| "qpx.qvlfiwaa" => "__builtin_qpx_qvlfiwaa", |
| "qpx.qvlfiwz" => "__builtin_qpx_qvlfiwz", |
| "qpx.qvlfiwza" => "__builtin_qpx_qvlfiwza", |
| "qpx.qvlfs" => "__builtin_qpx_qvlfs", |
| "qpx.qvlfsa" => "__builtin_qpx_qvlfsa", |
| "qpx.qvlpcld" => "__builtin_qpx_qvlpcld", |
| "qpx.qvlpcls" => "__builtin_qpx_qvlpcls", |
| "qpx.qvlpcrd" => "__builtin_qpx_qvlpcrd", |
| "qpx.qvlpcrs" => "__builtin_qpx_qvlpcrs", |
| "qpx.qvstfcd" => "__builtin_qpx_qvstfcd", |
| "qpx.qvstfcda" => "__builtin_qpx_qvstfcda", |
| "qpx.qvstfcs" => "__builtin_qpx_qvstfcs", |
| "qpx.qvstfcsa" => "__builtin_qpx_qvstfcsa", |
| "qpx.qvstfd" => "__builtin_qpx_qvstfd", |
| "qpx.qvstfda" => "__builtin_qpx_qvstfda", |
| "qpx.qvstfiw" => "__builtin_qpx_qvstfiw", |
| "qpx.qvstfiwa" => "__builtin_qpx_qvstfiwa", |
| "qpx.qvstfs" => "__builtin_qpx_qvstfs", |
| "qpx.qvstfsa" => "__builtin_qpx_qvstfsa", |
| _ => return ArchCheckResult::UnknownIntrinsic, |
| }, |
| "ptx" => match name { |
| "bar.sync" => "__builtin_ptx_bar_sync", |
| "read.clock" => "__builtin_ptx_read_clock", |
| "read.clock64" => "__builtin_ptx_read_clock64", |
| "read.gridid" => "__builtin_ptx_read_gridid", |
| "read.laneid" => "__builtin_ptx_read_laneid", |
| "read.lanemask.eq" => "__builtin_ptx_read_lanemask_eq", |
| "read.lanemask.ge" => "__builtin_ptx_read_lanemask_ge", |
| "read.lanemask.gt" => "__builtin_ptx_read_lanemask_gt", |
| "read.lanemask.le" => "__builtin_ptx_read_lanemask_le", |
| "read.lanemask.lt" => "__builtin_ptx_read_lanemask_lt", |
| "read.nsmid" => "__builtin_ptx_read_nsmid", |
| "read.nwarpid" => "__builtin_ptx_read_nwarpid", |
| "read.pm0" => "__builtin_ptx_read_pm0", |
| "read.pm1" => "__builtin_ptx_read_pm1", |
| "read.pm2" => "__builtin_ptx_read_pm2", |
| "read.pm3" => "__builtin_ptx_read_pm3", |
| "read.smid" => "__builtin_ptx_read_smid", |
| "read.warpid" => "__builtin_ptx_read_warpid", |
| _ => return ArchCheckResult::UnknownIntrinsic, |
| }, |
| "x86" => match name { |
| "addcarry.u32" => "__builtin_ia32_addcarry_u32", |
| "addcarry.u64" => "__builtin_ia32_addcarry_u64", |
| "addcarryx.u32" => "__builtin_ia32_addcarryx_u32", |
| "addcarryx.u64" => "__builtin_ia32_addcarryx_u64", |
| "avx.blend.pd.256" => "__builtin_ia32_blendpd256", |
| "avx.blend.ps.256" => "__builtin_ia32_blendps256", |
| "avx.cmp.pd.256" => "__builtin_ia32_cmppd256", |
| "avx.cmp.ps.256" => "__builtin_ia32_cmpps256", |
| "avx.cvt.ps2.pd.256" => "__builtin_ia32_cvtps2pd256", |
| "avx.cvtdq2.pd.256" => "__builtin_ia32_cvtdq2pd256", |
| "avx.cvtdq2.ps.256" => "__builtin_ia32_cvtdq2ps256", |
| "avx.round.pd.256" => "__builtin_ia32_roundpd256", |
| "avx.round.ps.256" => "__builtin_ia32_roundps256", |
| "avx.sqrt.pd.256" => "__builtin_ia32_sqrtpd256", |
| "avx.sqrt.ps.256" => "__builtin_ia32_sqrtps256", |
| "avx.storeu.dq.256" => "__builtin_ia32_storedqu256", |
| "avx.storeu.pd.256" => "__builtin_ia32_storeupd256", |
| "avx.storeu.ps.256" => "__builtin_ia32_storeups256", |
| "avx.vbroadcastf128.pd.256" => "__builtin_ia32_vbroadcastf128_pd256", |
| "avx.vbroadcastf128.ps.256" => "__builtin_ia32_vbroadcastf128_ps256", |
| "avx.vextractf128.pd.256" => "__builtin_ia32_vextractf128_pd256", |
| "avx.vextractf128.ps.256" => "__builtin_ia32_vextractf128_ps256", |
| "avx.vextractf128.si.256" => "__builtin_ia32_vextractf128_si256", |
| "avx.vinsertf128.pd.256" => "__builtin_ia32_vinsertf128_pd256", |
| "avx.vinsertf128.ps.256" => "__builtin_ia32_vinsertf128_ps256", |
| "avx.vinsertf128.si.256" => "__builtin_ia32_vinsertf128_si256", |
| "avx.vperm2f128.pd.256" => "__builtin_ia32_vperm2f128_pd256", |
| "avx.vperm2f128.ps.256" => "__builtin_ia32_vperm2f128_ps256", |
| "avx.vperm2f128.si.256" => "__builtin_ia32_vperm2f128_si256", |
| "avx2.movntdqa" => "__builtin_ia32_movntdqa256", |
| "avx2.pabs.b" => "__builtin_ia32_pabsb256", |
| "avx2.pabs.d" => "__builtin_ia32_pabsd256", |
| "avx2.pabs.w" => "__builtin_ia32_pabsw256", |
| "avx2.padds.b" => "__builtin_ia32_paddsb256", |
| "avx2.padds.w" => "__builtin_ia32_paddsw256", |
| "avx2.paddus.b" => "__builtin_ia32_paddusb256", |
| "avx2.paddus.w" => "__builtin_ia32_paddusw256", |
| "avx2.pblendd.128" => "__builtin_ia32_pblendd128", |
| "avx2.pblendd.256" => "__builtin_ia32_pblendd256", |
| "avx2.pblendw" => "__builtin_ia32_pblendw256", |
| "avx2.pbroadcastb.128" => "__builtin_ia32_pbroadcastb128", |
| "avx2.pbroadcastb.256" => "__builtin_ia32_pbroadcastb256", |
| "avx2.pbroadcastd.128" => "__builtin_ia32_pbroadcastd128", |
| "avx2.pbroadcastd.256" => "__builtin_ia32_pbroadcastd256", |
| "avx2.pbroadcastq.128" => "__builtin_ia32_pbroadcastq128", |
| "avx2.pbroadcastq.256" => "__builtin_ia32_pbroadcastq256", |
| "avx2.pbroadcastw.128" => "__builtin_ia32_pbroadcastw128", |
| "avx2.pbroadcastw.256" => "__builtin_ia32_pbroadcastw256", |
| "avx2.pmaxs.b" => "__builtin_ia32_pmaxsb256", |
| "avx2.pmaxs.d" => "__builtin_ia32_pmaxsd256", |
| "avx2.pmaxs.w" => "__builtin_ia32_pmaxsw256", |
| "avx2.pmaxu.b" => "__builtin_ia32_pmaxub256", |
| "avx2.pmaxu.d" => "__builtin_ia32_pmaxud256", |
| "avx2.pmaxu.w" => "__builtin_ia32_pmaxuw256", |
| "avx2.pmins.b" => "__builtin_ia32_pminsb256", |
| "avx2.pmins.d" => "__builtin_ia32_pminsd256", |
| "avx2.pmins.w" => "__builtin_ia32_pminsw256", |
| "avx2.pminu.b" => "__builtin_ia32_pminub256", |
| "avx2.pminu.d" => "__builtin_ia32_pminud256", |
| "avx2.pminu.w" => "__builtin_ia32_pminuw256", |
| "avx2.pmovsxbd" => "__builtin_ia32_pmovsxbd256", |
| "avx2.pmovsxbq" => "__builtin_ia32_pmovsxbq256", |
| "avx2.pmovsxbw" => "__builtin_ia32_pmovsxbw256", |
| "avx2.pmovsxdq" => "__builtin_ia32_pmovsxdq256", |
| "avx2.pmovsxwd" => "__builtin_ia32_pmovsxwd256", |
| "avx2.pmovsxwq" => "__builtin_ia32_pmovsxwq256", |
| "avx2.pmovzxbd" => "__builtin_ia32_pmovzxbd256", |
| "avx2.pmovzxbq" => "__builtin_ia32_pmovzxbq256", |
| "avx2.pmovzxbw" => "__builtin_ia32_pmovzxbw256", |
| "avx2.pmovzxdq" => "__builtin_ia32_pmovzxdq256", |
| "avx2.pmovzxwd" => "__builtin_ia32_pmovzxwd256", |
| "avx2.pmovzxwq" => "__builtin_ia32_pmovzxwq256", |
| "avx2.pmul.dq" => "__builtin_ia32_pmuldq256", |
| "avx2.pmulu.dq" => "__builtin_ia32_pmuludq256", |
| "avx2.psll.dq" => "__builtin_ia32_pslldqi256", |
| "avx2.psll.dq.bs" => "__builtin_ia32_pslldqi256_byteshift", |
| "avx2.psrl.dq" => "__builtin_ia32_psrldqi256", |
| "avx2.psrl.dq.bs" => "__builtin_ia32_psrldqi256_byteshift", |
| "avx2.psubs.b" => "__builtin_ia32_psubsb256", |
| "avx2.psubs.w" => "__builtin_ia32_psubsw256", |
| "avx2.psubus.b" => "__builtin_ia32_psubusb256", |
| "avx2.psubus.w" => "__builtin_ia32_psubusw256", |
| "avx2.vbroadcast.sd.pd.256" => "__builtin_ia32_vbroadcastsd_pd256", |
| "avx2.vbroadcast.ss.ps" => "__builtin_ia32_vbroadcastss_ps", |
| "avx2.vbroadcast.ss.ps.256" => "__builtin_ia32_vbroadcastss_ps256", |
| "avx2.vextracti128" => "__builtin_ia32_extract128i256", |
| "avx2.vinserti128" => "__builtin_ia32_insert128i256", |
| "avx2.vperm2i128" => "__builtin_ia32_permti256", |
| "avx512.cvtb2mask.128" => "__builtin_ia32_cvtb2mask128", |
| "avx512.cvtb2mask.256" => "__builtin_ia32_cvtb2mask256", |
| "avx512.cvtb2mask.512" => "__builtin_ia32_cvtb2mask512", |
| "avx512.cvtd2mask.128" => "__builtin_ia32_cvtd2mask128", |
| "avx512.cvtd2mask.256" => "__builtin_ia32_cvtd2mask256", |
| "avx512.cvtd2mask.512" => "__builtin_ia32_cvtd2mask512", |
| "avx512.cvtmask2b.128" => "__builtin_ia32_cvtmask2b128", |
| "avx512.cvtmask2b.256" => "__builtin_ia32_cvtmask2b256", |
| "avx512.cvtmask2b.512" => "__builtin_ia32_cvtmask2b512", |
| "avx512.cvtmask2d.128" => "__builtin_ia32_cvtmask2d128", |
| "avx512.cvtmask2d.256" => "__builtin_ia32_cvtmask2d256", |
| "avx512.cvtmask2d.512" => "__builtin_ia32_cvtmask2d512", |
| "avx512.cvtmask2q.128" => "__builtin_ia32_cvtmask2q128", |
| "avx512.cvtmask2q.256" => "__builtin_ia32_cvtmask2q256", |
| "avx512.cvtmask2q.512" => "__builtin_ia32_cvtmask2q512", |
| "avx512.cvtmask2w.128" => "__builtin_ia32_cvtmask2w128", |
| "avx512.cvtmask2w.256" => "__builtin_ia32_cvtmask2w256", |
| "avx512.cvtmask2w.512" => "__builtin_ia32_cvtmask2w512", |
| "avx512.cvtq2mask.128" => "__builtin_ia32_cvtq2mask128", |
| "avx512.cvtq2mask.256" => "__builtin_ia32_cvtq2mask256", |
| "avx512.cvtq2mask.512" => "__builtin_ia32_cvtq2mask512", |
| "avx512.cvtsd2usi" => "__builtin_ia32_cvtsd2usi", |
| "avx512.cvtsd2usi64" => "__builtin_ia32_cvtsd2usi64", |
| "avx512.cvtsi2sd32" => "__builtin_ia32_cvtsi2sd32", |
| "avx512.cvtss2usi" => "__builtin_ia32_cvtss2usi", |
| "avx512.cvtss2usi64" => "__builtin_ia32_cvtss2usi64", |
| "avx512.cvtw2mask.128" => "__builtin_ia32_cvtw2mask128", |
| "avx512.cvtw2mask.256" => "__builtin_ia32_cvtw2mask256", |
| "avx512.cvtw2mask.512" => "__builtin_ia32_cvtw2mask512", |
| "avx512.exp2.pd" => "__builtin_ia32_exp2pd_mask", |
| "avx512.exp2.ps" => "__builtin_ia32_exp2ps_mask", |
| "avx512.gather.dpd.512" => "__builtin_ia32_gathersiv8df", |
| "avx512.gather.dpi.512" => "__builtin_ia32_gathersiv16si", |
| "avx512.gather.dpq.512" => "__builtin_ia32_gathersiv8di", |
| "avx512.gather.dps.512" => "__builtin_ia32_gathersiv16sf", |
| "avx512.gather.qpd.512" => "__builtin_ia32_gatherdiv8df", |
| "avx512.gather.qpi.512" => "__builtin_ia32_gatherdiv16si", |
| "avx512.gather.qpq.512" => "__builtin_ia32_gatherdiv8di", |
| "avx512.gather.qps.512" => "__builtin_ia32_gatherdiv16sf", |
| "avx512.gather3div2.df" => "__builtin_ia32_gather3div2df", |
| "avx512.gather3div2.di" => "__builtin_ia32_gather3div2di", |
| "avx512.gather3div4.df" => "__builtin_ia32_gather3div4df", |
| "avx512.gather3div4.di" => "__builtin_ia32_gather3div4di", |
| "avx512.gather3div4.sf" => "__builtin_ia32_gather3div4sf", |
| "avx512.gather3div4.si" => "__builtin_ia32_gather3div4si", |
| "avx512.gather3div8.sf" => "__builtin_ia32_gather3div8sf", |
| "avx512.gather3div8.si" => "__builtin_ia32_gather3div8si", |
| "avx512.gather3siv2.df" => "__builtin_ia32_gather3siv2df", |
| "avx512.gather3siv2.di" => "__builtin_ia32_gather3siv2di", |
| "avx512.gather3siv4.df" => "__builtin_ia32_gather3siv4df", |
| "avx512.gather3siv4.di" => "__builtin_ia32_gather3siv4di", |
| "avx512.gather3siv4.sf" => "__builtin_ia32_gather3siv4sf", |
| "avx512.gather3siv4.si" => "__builtin_ia32_gather3siv4si", |
| "avx512.gather3siv8.sf" => "__builtin_ia32_gather3siv8sf", |
| "avx512.gather3siv8.si" => "__builtin_ia32_gather3siv8si", |
| "avx512.gatherpf.dpd.512" => "__builtin_ia32_gatherpfdpd", |
| "avx512.gatherpf.dps.512" => "__builtin_ia32_gatherpfdps", |
| "avx512.gatherpf.qpd.512" => "__builtin_ia32_gatherpfqpd", |
| "avx512.gatherpf.qps.512" => "__builtin_ia32_gatherpfqps", |
| "avx512.kand.w" => "__builtin_ia32_kandhi", |
| "avx512.kandn.w" => "__builtin_ia32_kandnhi", |
| "avx512.knot.w" => "__builtin_ia32_knothi", |
| "avx512.kor.w" => "__builtin_ia32_korhi", |
| "avx512.kortestc.w" => "__builtin_ia32_kortestchi", |
| "avx512.kortestz.w" => "__builtin_ia32_kortestzhi", |
| "avx512.kunpck.bw" => "__builtin_ia32_kunpckhi", |
| "avx512.kunpck.dq" => "__builtin_ia32_kunpckdi", |
| "avx512.kunpck.wd" => "__builtin_ia32_kunpcksi", |
| "avx512.kxnor.w" => "__builtin_ia32_kxnorhi", |
| "avx512.kxor.w" => "__builtin_ia32_kxorhi", |
| "avx512.mask.add.pd.128" => "__builtin_ia32_addpd128_mask", |
| "avx512.mask.add.pd.256" => "__builtin_ia32_addpd256_mask", |
| "avx512.mask.add.pd.512" => "__builtin_ia32_addpd512_mask", |
| "avx512.mask.add.ps.128" => "__builtin_ia32_addps128_mask", |
| "avx512.mask.add.ps.256" => "__builtin_ia32_addps256_mask", |
| "avx512.mask.add.ps.512" => "__builtin_ia32_addps512_mask", |
| "avx512.mask.and.pd.128" => "__builtin_ia32_andpd128_mask", |
| "avx512.mask.and.pd.256" => "__builtin_ia32_andpd256_mask", |
| "avx512.mask.and.pd.512" => "__builtin_ia32_andpd512_mask", |
| "avx512.mask.and.ps.128" => "__builtin_ia32_andps128_mask", |
| "avx512.mask.and.ps.256" => "__builtin_ia32_andps256_mask", |
| "avx512.mask.and.ps.512" => "__builtin_ia32_andps512_mask", |
| "avx512.mask.andn.pd.128" => "__builtin_ia32_andnpd128_mask", |
| "avx512.mask.andn.pd.256" => "__builtin_ia32_andnpd256_mask", |
| "avx512.mask.andn.pd.512" => "__builtin_ia32_andnpd512_mask", |
| "avx512.mask.andn.ps.128" => "__builtin_ia32_andnps128_mask", |
| "avx512.mask.andn.ps.256" => "__builtin_ia32_andnps256_mask", |
| "avx512.mask.andn.ps.512" => "__builtin_ia32_andnps512_mask", |
| "avx512.mask.blend.d.512" => "__builtin_ia32_blendmd_512_mask", |
| "avx512.mask.blend.pd.512" => "__builtin_ia32_blendmpd_512_mask", |
| "avx512.mask.blend.ps.512" => "__builtin_ia32_blendmps_512_mask", |
| "avx512.mask.blend.q.512" => "__builtin_ia32_blendmq_512_mask", |
| "avx512.mask.broadcastf32x2.256" => "__builtin_ia32_broadcastf32x2_256_mask", |
| "avx512.mask.broadcastf32x2.512" => "__builtin_ia32_broadcastf32x2_512_mask", |
| "avx512.mask.broadcastf32x4.256" => "__builtin_ia32_broadcastf32x4_256_mask", |
| "avx512.mask.broadcastf32x4.512" => "__builtin_ia32_broadcastf32x4_512", |
| "avx512.mask.broadcastf32x8.512" => "__builtin_ia32_broadcastf32x8_512_mask", |
| "avx512.mask.broadcastf64x2.256" => "__builtin_ia32_broadcastf64x2_256_mask", |
| "avx512.mask.broadcastf64x2.512" => "__builtin_ia32_broadcastf64x2_512_mask", |
| "avx512.mask.broadcastf64x4.512" => "__builtin_ia32_broadcastf64x4_512", |
| "avx512.mask.broadcasti32x2.128" => "__builtin_ia32_broadcasti32x2_128_mask", |
| "avx512.mask.broadcasti32x2.256" => "__builtin_ia32_broadcasti32x2_256_mask", |
| "avx512.mask.broadcasti32x2.512" => "__builtin_ia32_broadcasti32x2_512_mask", |
| "avx512.mask.broadcasti32x4.256" => "__builtin_ia32_broadcasti32x4_256_mask", |
| "avx512.mask.broadcasti32x4.512" => "__builtin_ia32_broadcasti32x4_512", |
| "avx512.mask.broadcasti32x8.512" => "__builtin_ia32_broadcasti32x8_512_mask", |
| "avx512.mask.broadcasti64x2.256" => "__builtin_ia32_broadcasti64x2_256_mask", |
| "avx512.mask.broadcasti64x2.512" => "__builtin_ia32_broadcasti64x2_512_mask", |
| "avx512.mask.broadcasti64x4.512" => "__builtin_ia32_broadcasti64x4_512", |
| "avx512.mask.cmp.pd.128" => "__builtin_ia32_cmppd128_mask", |
| "avx512.mask.cmp.pd.256" => "__builtin_ia32_cmppd256_mask", |
| "avx512.mask.cmp.pd.512" => "__builtin_ia32_cmppd512_mask", |
| "avx512.mask.cmp.ps.128" => "__builtin_ia32_cmpps128_mask", |
| "avx512.mask.cmp.ps.256" => "__builtin_ia32_cmpps256_mask", |
| "avx512.mask.cmp.ps.512" => "__builtin_ia32_cmpps512_mask", |
| "avx512.mask.compress.d.128" => "__builtin_ia32_compresssi128_mask", |
| "avx512.mask.compress.d.256" => "__builtin_ia32_compresssi256_mask", |
| "avx512.mask.compress.d.512" => "__builtin_ia32_compresssi512_mask", |
| "avx512.mask.compress.pd.128" => "__builtin_ia32_compressdf128_mask", |
| "avx512.mask.compress.pd.256" => "__builtin_ia32_compressdf256_mask", |
| "avx512.mask.compress.pd.512" => "__builtin_ia32_compressdf512_mask", |
| "avx512.mask.compress.ps.128" => "__builtin_ia32_compresssf128_mask", |
| "avx512.mask.compress.ps.256" => "__builtin_ia32_compresssf256_mask", |
| "avx512.mask.compress.ps.512" => "__builtin_ia32_compresssf512_mask", |
| "avx512.mask.compress.q.128" => "__builtin_ia32_compressdi128_mask", |
| "avx512.mask.compress.q.256" => "__builtin_ia32_compressdi256_mask", |
| "avx512.mask.compress.q.512" => "__builtin_ia32_compressdi512_mask", |
| "avx512.mask.compress.store.d.128" => "__builtin_ia32_compressstoresi128_mask", |
| "avx512.mask.compress.store.d.256" => "__builtin_ia32_compressstoresi256_mask", |
| "avx512.mask.compress.store.d.512" => "__builtin_ia32_compressstoresi512_mask", |
| "avx512.mask.compress.store.pd.128" => "__builtin_ia32_compressstoredf128_mask", |
| "avx512.mask.compress.store.pd.256" => "__builtin_ia32_compressstoredf256_mask", |
| "avx512.mask.compress.store.pd.512" => "__builtin_ia32_compressstoredf512_mask", |
| "avx512.mask.compress.store.ps.128" => "__builtin_ia32_compressstoresf128_mask", |
| "avx512.mask.compress.store.ps.256" => "__builtin_ia32_compressstoresf256_mask", |
| "avx512.mask.compress.store.ps.512" => "__builtin_ia32_compressstoresf512_mask", |
| "avx512.mask.compress.store.q.128" => "__builtin_ia32_compressstoredi128_mask", |
| "avx512.mask.compress.store.q.256" => "__builtin_ia32_compressstoredi256_mask", |
| "avx512.mask.compress.store.q.512" => "__builtin_ia32_compressstoredi512_mask", |
| "avx512.mask.conflict.d.128" => "__builtin_ia32_vpconflictsi_128_mask", |
| "avx512.mask.conflict.d.256" => "__builtin_ia32_vpconflictsi_256_mask", |
| "avx512.mask.conflict.d.512" => "__builtin_ia32_vpconflictsi_512_mask", |
| "avx512.mask.conflict.q.128" => "__builtin_ia32_vpconflictdi_128_mask", |
| "avx512.mask.conflict.q.256" => "__builtin_ia32_vpconflictdi_256_mask", |
| "avx512.mask.conflict.q.512" => "__builtin_ia32_vpconflictdi_512_mask", |
| "avx512.mask.cvtdq2pd.128" => "__builtin_ia32_cvtdq2pd128_mask", |
| "avx512.mask.cvtdq2pd.256" => "__builtin_ia32_cvtdq2pd256_mask", |
| "avx512.mask.cvtdq2pd.512" => "__builtin_ia32_cvtdq2pd512_mask", |
| "avx512.mask.cvtdq2ps.128" => "__builtin_ia32_cvtdq2ps128_mask", |
| "avx512.mask.cvtdq2ps.256" => "__builtin_ia32_cvtdq2ps256_mask", |
| "avx512.mask.cvtdq2ps.512" => "__builtin_ia32_cvtdq2ps512_mask", |
| "avx512.mask.cvtpd2dq.256" => "__builtin_ia32_cvtpd2dq256_mask", |
| "avx512.mask.cvtps2pd.128" => "__builtin_ia32_cvtps2pd128_mask", |
| "avx512.mask.cvtps2pd.256" => "__builtin_ia32_cvtps2pd256_mask", |
| "avx512.mask.cvtqq2pd.128" => "__builtin_ia32_cvtqq2pd128_mask", |
| "avx512.mask.cvtqq2pd.256" => "__builtin_ia32_cvtqq2pd256_mask", |
| "avx512.mask.cvtqq2pd.512" => "__builtin_ia32_cvtqq2pd512_mask", |
| "avx512.mask.cvtqq2ps.256" => "__builtin_ia32_cvtqq2ps256_mask", |
| "avx512.mask.cvtqq2ps.512" => "__builtin_ia32_cvtqq2ps512_mask", |
| "avx512.mask.cvttpd2dq.256" => "__builtin_ia32_cvttpd2dq256_mask", |
| "avx512.mask.cvttps2dq.128" => "__builtin_ia32_cvttps2dq128_mask", |
| "avx512.mask.cvttps2dq.256" => "__builtin_ia32_cvttps2dq256_mask", |
| "avx512.mask.cvtudq2pd.128" => "__builtin_ia32_cvtudq2pd128_mask", |
| "avx512.mask.cvtudq2pd.256" => "__builtin_ia32_cvtudq2pd256_mask", |
| "avx512.mask.cvtudq2pd.512" => "__builtin_ia32_cvtudq2pd512_mask", |
| "avx512.mask.cvtudq2ps.128" => "__builtin_ia32_cvtudq2ps128_mask", |
| "avx512.mask.cvtudq2ps.256" => "__builtin_ia32_cvtudq2ps256_mask", |
| "avx512.mask.cvtudq2ps.512" => "__builtin_ia32_cvtudq2ps512_mask", |
| "avx512.mask.cvtuqq2pd.128" => "__builtin_ia32_cvtuqq2pd128_mask", |
| "avx512.mask.cvtuqq2pd.256" => "__builtin_ia32_cvtuqq2pd256_mask", |
| "avx512.mask.cvtuqq2pd.512" => "__builtin_ia32_cvtuqq2pd512_mask", |
| "avx512.mask.cvtuqq2ps.256" => "__builtin_ia32_cvtuqq2ps256_mask", |
| "avx512.mask.cvtuqq2ps.512" => "__builtin_ia32_cvtuqq2ps512_mask", |
| "avx512.mask.dbpsadbw.128" => "__builtin_ia32_dbpsadbw128_mask", |
| "avx512.mask.dbpsadbw.256" => "__builtin_ia32_dbpsadbw256_mask", |
| "avx512.mask.dbpsadbw.512" => "__builtin_ia32_dbpsadbw512_mask", |
| "avx512.mask.div.pd.128" => "__builtin_ia32_divpd_mask", |
| "avx512.mask.div.pd.256" => "__builtin_ia32_divpd256_mask", |
| "avx512.mask.div.pd.512" => "__builtin_ia32_divpd512_mask", |
| "avx512.mask.div.ps.128" => "__builtin_ia32_divps_mask", |
| "avx512.mask.div.ps.256" => "__builtin_ia32_divps256_mask", |
| "avx512.mask.div.ps.512" => "__builtin_ia32_divps512_mask", |
| "avx512.mask.expand.d.128" => "__builtin_ia32_expandsi128_mask", |
| "avx512.mask.expand.d.256" => "__builtin_ia32_expandsi256_mask", |
| "avx512.mask.expand.d.512" => "__builtin_ia32_expandsi512_mask", |
| "avx512.mask.expand.load.d.128" => "__builtin_ia32_expandloadsi128_mask", |
| "avx512.mask.expand.load.d.256" => "__builtin_ia32_expandloadsi256_mask", |
| "avx512.mask.expand.load.d.512" => "__builtin_ia32_expandloadsi512_mask", |
| "avx512.mask.expand.load.pd.128" => "__builtin_ia32_expandloaddf128_mask", |
| "avx512.mask.expand.load.pd.256" => "__builtin_ia32_expandloaddf256_mask", |
| "avx512.mask.expand.load.pd.512" => "__builtin_ia32_expandloaddf512_mask", |
| "avx512.mask.expand.load.ps.128" => "__builtin_ia32_expandloadsf128_mask", |
| "avx512.mask.expand.load.ps.256" => "__builtin_ia32_expandloadsf256_mask", |
| "avx512.mask.expand.load.ps.512" => "__builtin_ia32_expandloadsf512_mask", |
| "avx512.mask.expand.load.q.128" => "__builtin_ia32_expandloaddi128_mask", |
| "avx512.mask.expand.load.q.256" => "__builtin_ia32_expandloaddi256_mask", |
| "avx512.mask.expand.load.q.512" => "__builtin_ia32_expandloaddi512_mask", |
| "avx512.mask.expand.pd.128" => "__builtin_ia32_expanddf128_mask", |
| "avx512.mask.expand.pd.256" => "__builtin_ia32_expanddf256_mask", |
| "avx512.mask.expand.pd.512" => "__builtin_ia32_expanddf512_mask", |
| "avx512.mask.expand.ps.128" => "__builtin_ia32_expandsf128_mask", |
| "avx512.mask.expand.ps.256" => "__builtin_ia32_expandsf256_mask", |
| "avx512.mask.expand.ps.512" => "__builtin_ia32_expandsf512_mask", |
| "avx512.mask.expand.q.128" => "__builtin_ia32_expanddi128_mask", |
| "avx512.mask.expand.q.256" => "__builtin_ia32_expanddi256_mask", |
| "avx512.mask.expand.q.512" => "__builtin_ia32_expanddi512_mask", |
| "avx512.mask.fpclass.pd.128" => "__builtin_ia32_fpclasspd128_mask", |
| "avx512.mask.fpclass.pd.256" => "__builtin_ia32_fpclasspd256_mask", |
| "avx512.mask.fpclass.pd.512" => "__builtin_ia32_fpclasspd512_mask", |
| "avx512.mask.fpclass.ps.128" => "__builtin_ia32_fpclassps128_mask", |
| "avx512.mask.fpclass.ps.256" => "__builtin_ia32_fpclassps256_mask", |
| "avx512.mask.fpclass.ps.512" => "__builtin_ia32_fpclassps512_mask", |
| "avx512.mask.insertf32x4.256" => "__builtin_ia32_insertf32x4_256_mask", |
| "avx512.mask.insertf32x4.512" => "__builtin_ia32_insertf32x4_mask", |
| "avx512.mask.insertf32x8.512" => "__builtin_ia32_insertf32x8_mask", |
| "avx512.mask.insertf64x2.256" => "__builtin_ia32_insertf64x2_256_mask", |
| "avx512.mask.insertf64x2.512" => "__builtin_ia32_insertf64x2_512_mask", |
| "avx512.mask.insertf64x4.512" => "__builtin_ia32_insertf64x4_mask", |
| "avx512.mask.inserti32x4.256" => "__builtin_ia32_inserti32x4_256_mask", |
| "avx512.mask.inserti32x4.512" => "__builtin_ia32_inserti32x4_mask", |
| "avx512.mask.inserti32x8.512" => "__builtin_ia32_inserti32x8_mask", |
| "avx512.mask.inserti64x2.256" => "__builtin_ia32_inserti64x2_256_mask", |
| "avx512.mask.inserti64x2.512" => "__builtin_ia32_inserti64x2_512_mask", |
| "avx512.mask.inserti64x4.512" => "__builtin_ia32_inserti64x4_mask", |
| "avx512.mask.loadu.d.512" => "__builtin_ia32_loaddqusi512_mask", |
| "avx512.mask.loadu.pd.512" => "__builtin_ia32_loadupd512_mask", |
| "avx512.mask.loadu.ps.512" => "__builtin_ia32_loadups512_mask", |
| "avx512.mask.loadu.q.512" => "__builtin_ia32_loaddqudi512_mask", |
| "avx512.mask.lzcnt.d.512" => "__builtin_ia32_vplzcntd_512_mask", |
| "avx512.mask.lzcnt.q.512" => "__builtin_ia32_vplzcntq_512_mask", |
| "avx512.mask.max.pd.128" => "__builtin_ia32_maxpd_mask", |
| "avx512.mask.max.pd.256" => "__builtin_ia32_maxpd256_mask", |
| "avx512.mask.max.pd.512" => "__builtin_ia32_maxpd512_mask", |
| "avx512.mask.max.ps.128" => "__builtin_ia32_maxps_mask", |
| "avx512.mask.max.ps.256" => "__builtin_ia32_maxps256_mask", |
| "avx512.mask.max.ps.512" => "__builtin_ia32_maxps512_mask", |
| "avx512.mask.min.pd.128" => "__builtin_ia32_minpd_mask", |
| "avx512.mask.min.pd.256" => "__builtin_ia32_minpd256_mask", |
| "avx512.mask.min.pd.512" => "__builtin_ia32_minpd512_mask", |
| "avx512.mask.min.ps.128" => "__builtin_ia32_minps_mask", |
| "avx512.mask.min.ps.256" => "__builtin_ia32_minps256_mask", |
| "avx512.mask.min.ps.512" => "__builtin_ia32_minps512_mask", |
| "avx512.mask.move.sd" => "__builtin_ia32_movsd_mask", |
| "avx512.mask.move.ss" => "__builtin_ia32_movss_mask", |
| "avx512.mask.mul.pd.128" => "__builtin_ia32_mulpd_mask", |
| "avx512.mask.mul.pd.256" => "__builtin_ia32_mulpd256_mask", |
| "avx512.mask.mul.pd.512" => "__builtin_ia32_mulpd512_mask", |
| "avx512.mask.mul.ps.128" => "__builtin_ia32_mulps_mask", |
| "avx512.mask.mul.ps.256" => "__builtin_ia32_mulps256_mask", |
| "avx512.mask.mul.ps.512" => "__builtin_ia32_mulps512_mask", |
| "avx512.mask.or.pd.128" => "__builtin_ia32_orpd128_mask", |
| "avx512.mask.or.pd.256" => "__builtin_ia32_orpd256_mask", |
| "avx512.mask.or.pd.512" => "__builtin_ia32_orpd512_mask", |
| "avx512.mask.or.ps.128" => "__builtin_ia32_orps128_mask", |
| "avx512.mask.or.ps.256" => "__builtin_ia32_orps256_mask", |
| "avx512.mask.or.ps.512" => "__builtin_ia32_orps512_mask", |
| "avx512.mask.pabs.b.128" => "__builtin_ia32_pabsb128_mask", |
| "avx512.mask.pabs.b.256" => "__builtin_ia32_pabsb256_mask", |
| "avx512.mask.pabs.b.512" => "__builtin_ia32_pabsb512_mask", |
| "avx512.mask.pabs.d.128" => "__builtin_ia32_pabsd128_mask", |
| "avx512.mask.pabs.d.256" => "__builtin_ia32_pabsd256_mask", |
| "avx512.mask.pabs.d.512" => "__builtin_ia32_pabsd512_mask", |
| "avx512.mask.pabs.q.128" => "__builtin_ia32_pabsq128_mask", |
| "avx512.mask.pabs.q.256" => "__builtin_ia32_pabsq256_mask", |
| "avx512.mask.pabs.q.512" => "__builtin_ia32_pabsq512_mask", |
| "avx512.mask.pabs.w.128" => "__builtin_ia32_pabsw128_mask", |
| "avx512.mask.pabs.w.256" => "__builtin_ia32_pabsw256_mask", |
| "avx512.mask.pabs.w.512" => "__builtin_ia32_pabsw512_mask", |
| "avx512.mask.packssdw.128" => "__builtin_ia32_packssdw128_mask", |
| "avx512.mask.packssdw.256" => "__builtin_ia32_packssdw256_mask", |
| "avx512.mask.packssdw.512" => "__builtin_ia32_packssdw512_mask", |
| "avx512.mask.packsswb.128" => "__builtin_ia32_packsswb128_mask", |
| "avx512.mask.packsswb.256" => "__builtin_ia32_packsswb256_mask", |
| "avx512.mask.packsswb.512" => "__builtin_ia32_packsswb512_mask", |
| "avx512.mask.packusdw.128" => "__builtin_ia32_packusdw128_mask", |
| "avx512.mask.packusdw.256" => "__builtin_ia32_packusdw256_mask", |
| "avx512.mask.packusdw.512" => "__builtin_ia32_packusdw512_mask", |
| "avx512.mask.packuswb.128" => "__builtin_ia32_packuswb128_mask", |
| "avx512.mask.packuswb.256" => "__builtin_ia32_packuswb256_mask", |
| "avx512.mask.packuswb.512" => "__builtin_ia32_packuswb512_mask", |
| "avx512.mask.padd.b.128" => "__builtin_ia32_paddb128_mask", |
| "avx512.mask.padd.b.256" => "__builtin_ia32_paddb256_mask", |
| "avx512.mask.padd.b.512" => "__builtin_ia32_paddb512_mask", |
| "avx512.mask.padd.d.128" => "__builtin_ia32_paddd128_mask", |
| "avx512.mask.padd.d.256" => "__builtin_ia32_paddd256_mask", |
| "avx512.mask.padd.d.512" => "__builtin_ia32_paddd512_mask", |
| "avx512.mask.padd.q.128" => "__builtin_ia32_paddq128_mask", |
| "avx512.mask.padd.q.256" => "__builtin_ia32_paddq256_mask", |
| "avx512.mask.padd.q.512" => "__builtin_ia32_paddq512_mask", |
| "avx512.mask.padd.w.128" => "__builtin_ia32_paddw128_mask", |
| "avx512.mask.padd.w.256" => "__builtin_ia32_paddw256_mask", |
| "avx512.mask.padd.w.512" => "__builtin_ia32_paddw512_mask", |
| "avx512.mask.padds.b.128" => "__builtin_ia32_paddsb128_mask", |
| "avx512.mask.padds.b.256" => "__builtin_ia32_paddsb256_mask", |
| "avx512.mask.padds.b.512" => "__builtin_ia32_paddsb512_mask", |
| "avx512.mask.padds.w.128" => "__builtin_ia32_paddsw128_mask", |
| "avx512.mask.padds.w.256" => "__builtin_ia32_paddsw256_mask", |
| "avx512.mask.padds.w.512" => "__builtin_ia32_paddsw512_mask", |
| "avx512.mask.paddus.b.128" => "__builtin_ia32_paddusb128_mask", |
| "avx512.mask.paddus.b.256" => "__builtin_ia32_paddusb256_mask", |
| "avx512.mask.paddus.b.512" => "__builtin_ia32_paddusb512_mask", |
| "avx512.mask.paddus.w.128" => "__builtin_ia32_paddusw128_mask", |
| "avx512.mask.paddus.w.256" => "__builtin_ia32_paddusw256_mask", |
| "avx512.mask.paddus.w.512" => "__builtin_ia32_paddusw512_mask", |
| "avx512.mask.pand.d.512" => "__builtin_ia32_pandd512_mask", |
| "avx512.mask.pand.q.512" => "__builtin_ia32_pandq512_mask", |
| "avx512.mask.pavg.b.128" => "__builtin_ia32_pavgb128_mask", |
| "avx512.mask.pavg.b.256" => "__builtin_ia32_pavgb256_mask", |
| "avx512.mask.pavg.b.512" => "__builtin_ia32_pavgb512_mask", |
| "avx512.mask.pavg.w.128" => "__builtin_ia32_pavgw128_mask", |
| "avx512.mask.pavg.w.256" => "__builtin_ia32_pavgw256_mask", |
| "avx512.mask.pavg.w.512" => "__builtin_ia32_pavgw512_mask", |
| "avx512.mask.pbroadcast.b.gpr.128" => "__builtin_ia32_pbroadcastb128_gpr_mask", |
| "avx512.mask.pbroadcast.b.gpr.256" => "__builtin_ia32_pbroadcastb256_gpr_mask", |
| "avx512.mask.pbroadcast.b.gpr.512" => "__builtin_ia32_pbroadcastb512_gpr_mask", |
| "avx512.mask.pbroadcast.d.gpr.128" => "__builtin_ia32_pbroadcastd128_gpr_mask", |
| "avx512.mask.pbroadcast.d.gpr.256" => "__builtin_ia32_pbroadcastd256_gpr_mask", |
| "avx512.mask.pbroadcast.d.gpr.512" => "__builtin_ia32_pbroadcastd512_gpr_mask", |
| "avx512.mask.pbroadcast.q.gpr.128" => "__builtin_ia32_pbroadcastq128_gpr_mask", |
| "avx512.mask.pbroadcast.q.gpr.256" => "__builtin_ia32_pbroadcastq256_gpr_mask", |
| "avx512.mask.pbroadcast.q.gpr.512" => "__builtin_ia32_pbroadcastq512_gpr_mask", |
| "avx512.mask.pbroadcast.q.mem.512" => "__builtin_ia32_pbroadcastq512_mem_mask", |
| "avx512.mask.pbroadcast.w.gpr.128" => "__builtin_ia32_pbroadcastw128_gpr_mask", |
| "avx512.mask.pbroadcast.w.gpr.256" => "__builtin_ia32_pbroadcastw256_gpr_mask", |
| "avx512.mask.pbroadcast.w.gpr.512" => "__builtin_ia32_pbroadcastw512_gpr_mask", |
| "avx512.mask.pcmpeq.b.128" => "__builtin_ia32_pcmpeqb128_mask", |
| "avx512.mask.pcmpeq.b.256" => "__builtin_ia32_pcmpeqb256_mask", |
| "avx512.mask.pcmpeq.b.512" => "__builtin_ia32_pcmpeqb512_mask", |
| "avx512.mask.pcmpeq.d.128" => "__builtin_ia32_pcmpeqd128_mask", |
| "avx512.mask.pcmpeq.d.256" => "__builtin_ia32_pcmpeqd256_mask", |
| "avx512.mask.pcmpeq.d.512" => "__builtin_ia32_pcmpeqd512_mask", |
| "avx512.mask.pcmpeq.q.128" => "__builtin_ia32_pcmpeqq128_mask", |
| "avx512.mask.pcmpeq.q.256" => "__builtin_ia32_pcmpeqq256_mask", |
| "avx512.mask.pcmpeq.q.512" => "__builtin_ia32_pcmpeqq512_mask", |
| "avx512.mask.pcmpeq.w.128" => "__builtin_ia32_pcmpeqw128_mask", |
| "avx512.mask.pcmpeq.w.256" => "__builtin_ia32_pcmpeqw256_mask", |
| "avx512.mask.pcmpeq.w.512" => "__builtin_ia32_pcmpeqw512_mask", |
| "avx512.mask.pcmpgt.b.128" => "__builtin_ia32_pcmpgtb128_mask", |
| "avx512.mask.pcmpgt.b.256" => "__builtin_ia32_pcmpgtb256_mask", |
| "avx512.mask.pcmpgt.b.512" => "__builtin_ia32_pcmpgtb512_mask", |
| "avx512.mask.pcmpgt.d.128" => "__builtin_ia32_pcmpgtd128_mask", |
| "avx512.mask.pcmpgt.d.256" => "__builtin_ia32_pcmpgtd256_mask", |
| "avx512.mask.pcmpgt.d.512" => "__builtin_ia32_pcmpgtd512_mask", |
| "avx512.mask.pcmpgt.q.128" => "__builtin_ia32_pcmpgtq128_mask", |
| "avx512.mask.pcmpgt.q.256" => "__builtin_ia32_pcmpgtq256_mask", |
| "avx512.mask.pcmpgt.q.512" => "__builtin_ia32_pcmpgtq512_mask", |
| "avx512.mask.pcmpgt.w.128" => "__builtin_ia32_pcmpgtw128_mask", |
| "avx512.mask.pcmpgt.w.256" => "__builtin_ia32_pcmpgtw256_mask", |
| "avx512.mask.pcmpgt.w.512" => "__builtin_ia32_pcmpgtw512_mask", |
| "avx512.mask.permvar.df.256" => "__builtin_ia32_permvardf256_mask", |
| "avx512.mask.permvar.df.512" => "__builtin_ia32_permvardf512_mask", |
| "avx512.mask.permvar.di.256" => "__builtin_ia32_permvardi256_mask", |
| "avx512.mask.permvar.di.512" => "__builtin_ia32_permvardi512_mask", |
| "avx512.mask.permvar.hi.128" => "__builtin_ia32_permvarhi128_mask", |
| "avx512.mask.permvar.hi.256" => "__builtin_ia32_permvarhi256_mask", |
| "avx512.mask.permvar.hi.512" => "__builtin_ia32_permvarhi512_mask", |
| "avx512.mask.permvar.qi.128" => "__builtin_ia32_permvarqi128_mask", |
| "avx512.mask.permvar.qi.256" => "__builtin_ia32_permvarqi256_mask", |
| "avx512.mask.permvar.qi.512" => "__builtin_ia32_permvarqi512_mask", |
| "avx512.mask.permvar.sf.256" => "__builtin_ia32_permvarsf256_mask", |
| "avx512.mask.permvar.sf.512" => "__builtin_ia32_permvarsf512_mask", |
| "avx512.mask.permvar.si.256" => "__builtin_ia32_permvarsi256_mask", |
| "avx512.mask.permvar.si.512" => "__builtin_ia32_permvarsi512_mask", |
| "avx512.mask.pmaddubs.w.128" => "__builtin_ia32_pmaddubsw128_mask", |
| "avx512.mask.pmaddubs.w.256" => "__builtin_ia32_pmaddubsw256_mask", |
| "avx512.mask.pmaddubs.w.512" => "__builtin_ia32_pmaddubsw512_mask", |
| "avx512.mask.pmaddw.d.128" => "__builtin_ia32_pmaddwd128_mask", |
| "avx512.mask.pmaddw.d.256" => "__builtin_ia32_pmaddwd256_mask", |
| "avx512.mask.pmaddw.d.512" => "__builtin_ia32_pmaddwd512_mask", |
| "avx512.mask.pmaxs.b.128" => "__builtin_ia32_pmaxsb128_mask", |
| "avx512.mask.pmaxs.b.256" => "__builtin_ia32_pmaxsb256_mask", |
| "avx512.mask.pmaxs.b.512" => "__builtin_ia32_pmaxsb512_mask", |
| "avx512.mask.pmaxs.d.128" => "__builtin_ia32_pmaxsd128_mask", |
| "avx512.mask.pmaxs.d.256" => "__builtin_ia32_pmaxsd256_mask", |
| "avx512.mask.pmaxs.d.512" => "__builtin_ia32_pmaxsd512_mask", |
| "avx512.mask.pmaxs.q.128" => "__builtin_ia32_pmaxsq128_mask", |
| "avx512.mask.pmaxs.q.256" => "__builtin_ia32_pmaxsq256_mask", |
| "avx512.mask.pmaxs.q.512" => "__builtin_ia32_pmaxsq512_mask", |
| "avx512.mask.pmaxs.w.128" => "__builtin_ia32_pmaxsw128_mask", |
| "avx512.mask.pmaxs.w.256" => "__builtin_ia32_pmaxsw256_mask", |
| "avx512.mask.pmaxs.w.512" => "__builtin_ia32_pmaxsw512_mask", |
| "avx512.mask.pmaxu.b.128" => "__builtin_ia32_pmaxub128_mask", |
| "avx512.mask.pmaxu.b.256" => "__builtin_ia32_pmaxub256_mask", |
| "avx512.mask.pmaxu.b.512" => "__builtin_ia32_pmaxub512_mask", |
| "avx512.mask.pmaxu.d.128" => "__builtin_ia32_pmaxud128_mask", |
| "avx512.mask.pmaxu.d.256" => "__builtin_ia32_pmaxud256_mask", |
| "avx512.mask.pmaxu.d.512" => "__builtin_ia32_pmaxud512_mask", |
| "avx512.mask.pmaxu.q.128" => "__builtin_ia32_pmaxuq128_mask", |
| "avx512.mask.pmaxu.q.256" => "__builtin_ia32_pmaxuq256_mask", |
| "avx512.mask.pmaxu.q.512" => "__builtin_ia32_pmaxuq512_mask", |
| "avx512.mask.pmaxu.w.128" => "__builtin_ia32_pmaxuw128_mask", |
| "avx512.mask.pmaxu.w.256" => "__builtin_ia32_pmaxuw256_mask", |
| "avx512.mask.pmaxu.w.512" => "__builtin_ia32_pmaxuw512_mask", |
| "avx512.mask.pmins.b.128" => "__builtin_ia32_pminsb128_mask", |
| "avx512.mask.pmins.b.256" => "__builtin_ia32_pminsb256_mask", |
| "avx512.mask.pmins.b.512" => "__builtin_ia32_pminsb512_mask", |
| "avx512.mask.pmins.d.128" => "__builtin_ia32_pminsd128_mask", |
| "avx512.mask.pmins.d.256" => "__builtin_ia32_pminsd256_mask", |
| "avx512.mask.pmins.d.512" => "__builtin_ia32_pminsd512_mask", |
| "avx512.mask.pmins.q.128" => "__builtin_ia32_pminsq128_mask", |
| "avx512.mask.pmins.q.256" => "__builtin_ia32_pminsq256_mask", |
| "avx512.mask.pmins.q.512" => "__builtin_ia32_pminsq512_mask", |
| "avx512.mask.pmins.w.128" => "__builtin_ia32_pminsw128_mask", |
| "avx512.mask.pmins.w.256" => "__builtin_ia32_pminsw256_mask", |
| "avx512.mask.pmins.w.512" => "__builtin_ia32_pminsw512_mask", |
| "avx512.mask.pminu.b.128" => "__builtin_ia32_pminub128_mask", |
| "avx512.mask.pminu.b.256" => "__builtin_ia32_pminub256_mask", |
| "avx512.mask.pminu.b.512" => "__builtin_ia32_pminub512_mask", |
| "avx512.mask.pminu.d.128" => "__builtin_ia32_pminud128_mask", |
| "avx512.mask.pminu.d.256" => "__builtin_ia32_pminud256_mask", |
| "avx512.mask.pminu.d.512" => "__builtin_ia32_pminud512_mask", |
| "avx512.mask.pminu.q.128" => "__builtin_ia32_pminuq128_mask", |
| "avx512.mask.pminu.q.256" => "__builtin_ia32_pminuq256_mask", |
| "avx512.mask.pminu.q.512" => "__builtin_ia32_pminuq512_mask", |
| "avx512.mask.pminu.w.128" => "__builtin_ia32_pminuw128_mask", |
| "avx512.mask.pminu.w.256" => "__builtin_ia32_pminuw256_mask", |
| "avx512.mask.pminu.w.512" => "__builtin_ia32_pminuw512_mask", |
| "avx512.mask.pmov.db.512" => "__builtin_ia32_pmovdb512_mask", |
| "avx512.mask.pmov.dw.512" => "__builtin_ia32_pmovdw512_mask", |
| "avx512.mask.pmov.qd.256" => "__builtin_ia32_pmovqd256_mask", |
| "avx512.mask.pmov.qd.512" => "__builtin_ia32_pmovqd512_mask", |
| "avx512.mask.pmov.qw.512" => "__builtin_ia32_pmovqw512_mask", |
| "avx512.mask.pmov.wb.256" => "__builtin_ia32_pmovwb256_mask", |
| "avx512.mask.pmov.wb.512" => "__builtin_ia32_pmovwb512_mask", |
| "avx512.mask.pmovsxb.d.128" => "__builtin_ia32_pmovsxbd128_mask", |
| "avx512.mask.pmovsxb.d.256" => "__builtin_ia32_pmovsxbd256_mask", |
| "avx512.mask.pmovsxb.d.512" => "__builtin_ia32_pmovsxbd512_mask", |
| "avx512.mask.pmovsxb.q.128" => "__builtin_ia32_pmovsxbq128_mask", |
| "avx512.mask.pmovsxb.q.256" => "__builtin_ia32_pmovsxbq256_mask", |
| "avx512.mask.pmovsxb.q.512" => "__builtin_ia32_pmovsxbq512_mask", |
| "avx512.mask.pmovsxb.w.128" => "__builtin_ia32_pmovsxbw128_mask", |
| "avx512.mask.pmovsxb.w.256" => "__builtin_ia32_pmovsxbw256_mask", |
| "avx512.mask.pmovsxb.w.512" => "__builtin_ia32_pmovsxbw512_mask", |
| "avx512.mask.pmovsxd.q.128" => "__builtin_ia32_pmovsxdq128_mask", |
| "avx512.mask.pmovsxd.q.256" => "__builtin_ia32_pmovsxdq256_mask", |
| "avx512.mask.pmovsxd.q.512" => "__builtin_ia32_pmovsxdq512_mask", |
| "avx512.mask.pmovsxw.d.128" => "__builtin_ia32_pmovsxwd128_mask", |
| "avx512.mask.pmovsxw.d.256" => "__builtin_ia32_pmovsxwd256_mask", |
| "avx512.mask.pmovsxw.d.512" => "__builtin_ia32_pmovsxwd512_mask", |
| "avx512.mask.pmovsxw.q.128" => "__builtin_ia32_pmovsxwq128_mask", |
| "avx512.mask.pmovsxw.q.256" => "__builtin_ia32_pmovsxwq256_mask", |
| "avx512.mask.pmovsxw.q.512" => "__builtin_ia32_pmovsxwq512_mask", |
| "avx512.mask.pmovzxb.d.128" => "__builtin_ia32_pmovzxbd128_mask", |
| "avx512.mask.pmovzxb.d.256" => "__builtin_ia32_pmovzxbd256_mask", |
| "avx512.mask.pmovzxb.d.512" => "__builtin_ia32_pmovzxbd512_mask", |
| "avx512.mask.pmovzxb.q.128" => "__builtin_ia32_pmovzxbq128_mask", |
| "avx512.mask.pmovzxb.q.256" => "__builtin_ia32_pmovzxbq256_mask", |
| "avx512.mask.pmovzxb.q.512" => "__builtin_ia32_pmovzxbq512_mask", |
| "avx512.mask.pmovzxb.w.128" => "__builtin_ia32_pmovzxbw128_mask", |
| "avx512.mask.pmovzxb.w.256" => "__builtin_ia32_pmovzxbw256_mask", |
| "avx512.mask.pmovzxb.w.512" => "__builtin_ia32_pmovzxbw512_mask", |
| "avx512.mask.pmovzxd.q.128" => "__builtin_ia32_pmovzxdq128_mask", |
| "avx512.mask.pmovzxd.q.256" => "__builtin_ia32_pmovzxdq256_mask", |
| "avx512.mask.pmovzxd.q.512" => "__builtin_ia32_pmovzxdq512_mask", |
| "avx512.mask.pmovzxw.d.128" => "__builtin_ia32_pmovzxwd128_mask", |
| "avx512.mask.pmovzxw.d.256" => "__builtin_ia32_pmovzxwd256_mask", |
| "avx512.mask.pmovzxw.d.512" => "__builtin_ia32_pmovzxwd512_mask", |
| "avx512.mask.pmovzxw.q.128" => "__builtin_ia32_pmovzxwq128_mask", |
| "avx512.mask.pmovzxw.q.256" => "__builtin_ia32_pmovzxwq256_mask", |
| "avx512.mask.pmovzxw.q.512" => "__builtin_ia32_pmovzxwq512_mask", |
| "avx512.mask.pmul.dq.128" => "__builtin_ia32_pmuldq128_mask", |
| "avx512.mask.pmul.dq.256" => "__builtin_ia32_pmuldq256_mask", |
| "avx512.mask.pmul.dq.512" => "__builtin_ia32_pmuldq512_mask", |
| "avx512.mask.pmul.hr.sw.128" => "__builtin_ia32_pmulhrsw128_mask", |
| "avx512.mask.pmul.hr.sw.256" => "__builtin_ia32_pmulhrsw256_mask", |
| "avx512.mask.pmul.hr.sw.512" => "__builtin_ia32_pmulhrsw512_mask", |
| "avx512.mask.pmulh.w.128" => "__builtin_ia32_pmulhw128_mask", |
| "avx512.mask.pmulh.w.256" => "__builtin_ia32_pmulhw256_mask", |
| "avx512.mask.pmulh.w.512" => "__builtin_ia32_pmulhw512_mask", |
| "avx512.mask.pmulhu.w.128" => "__builtin_ia32_pmulhuw128_mask", |
| "avx512.mask.pmulhu.w.256" => "__builtin_ia32_pmulhuw256_mask", |
| "avx512.mask.pmulhu.w.512" => "__builtin_ia32_pmulhuw512_mask", |
| "avx512.mask.pmull.d.128" => "__builtin_ia32_pmulld128_mask", |
| "avx512.mask.pmull.d.256" => "__builtin_ia32_pmulld256_mask", |
| "avx512.mask.pmull.d.512" => "__builtin_ia32_pmulld512_mask", |
| "avx512.mask.pmull.q.128" => "__builtin_ia32_pmullq128_mask", |
| "avx512.mask.pmull.q.256" => "__builtin_ia32_pmullq256_mask", |
| "avx512.mask.pmull.q.512" => "__builtin_ia32_pmullq512_mask", |
| "avx512.mask.pmull.w.128" => "__builtin_ia32_pmullw128_mask", |
| "avx512.mask.pmull.w.256" => "__builtin_ia32_pmullw256_mask", |
| "avx512.mask.pmull.w.512" => "__builtin_ia32_pmullw512_mask", |
| "avx512.mask.pmultishift.qb.128" => "__builtin_ia32_vpmultishiftqb128_mask", |
| "avx512.mask.pmultishift.qb.256" => "__builtin_ia32_vpmultishiftqb256_mask", |
| "avx512.mask.pmultishift.qb.512" => "__builtin_ia32_vpmultishiftqb512_mask", |
| "avx512.mask.pmulu.dq.128" => "__builtin_ia32_pmuludq128_mask", |
| "avx512.mask.pmulu.dq.256" => "__builtin_ia32_pmuludq256_mask", |
| "avx512.mask.pmulu.dq.512" => "__builtin_ia32_pmuludq512_mask", |
| "avx512.mask.prol.d.128" => "__builtin_ia32_prold128_mask", |
| "avx512.mask.prol.d.256" => "__builtin_ia32_prold256_mask", |
| "avx512.mask.prol.d.512" => "__builtin_ia32_prold512_mask", |
| "avx512.mask.prol.q.128" => "__builtin_ia32_prolq128_mask", |
| "avx512.mask.prol.q.256" => "__builtin_ia32_prolq256_mask", |
| "avx512.mask.prol.q.512" => "__builtin_ia32_prolq512_mask", |
| "avx512.mask.prolv.d.128" => "__builtin_ia32_prolvd128_mask", |
| "avx512.mask.prolv.d.256" => "__builtin_ia32_prolvd256_mask", |
| "avx512.mask.prolv.d.512" => "__builtin_ia32_prolvd512_mask", |
| "avx512.mask.prolv.q.128" => "__builtin_ia32_prolvq128_mask", |
| "avx512.mask.prolv.q.256" => "__builtin_ia32_prolvq256_mask", |
| "avx512.mask.prolv.q.512" => "__builtin_ia32_prolvq512_mask", |
| "avx512.mask.pror.d.128" => "__builtin_ia32_prord128_mask", |
| "avx512.mask.pror.d.256" => "__builtin_ia32_prord256_mask", |
| "avx512.mask.pror.d.512" => "__builtin_ia32_prord512_mask", |
| "avx512.mask.pror.q.128" => "__builtin_ia32_prorq128_mask", |
| "avx512.mask.pror.q.256" => "__builtin_ia32_prorq256_mask", |
| "avx512.mask.pror.q.512" => "__builtin_ia32_prorq512_mask", |
| "avx512.mask.prorv.d.128" => "__builtin_ia32_prorvd128_mask", |
| "avx512.mask.prorv.d.256" => "__builtin_ia32_prorvd256_mask", |
| "avx512.mask.prorv.d.512" => "__builtin_ia32_prorvd512_mask", |
| "avx512.mask.prorv.q.128" => "__builtin_ia32_prorvq128_mask", |
| "avx512.mask.prorv.q.256" => "__builtin_ia32_prorvq256_mask", |
| "avx512.mask.prorv.q.512" => "__builtin_ia32_prorvq512_mask", |
| "avx512.mask.pshuf.b.128" => "__builtin_ia32_pshufb128_mask", |
| "avx512.mask.pshuf.b.256" => "__builtin_ia32_pshufb256_mask", |
| "avx512.mask.pshuf.b.512" => "__builtin_ia32_pshufb512_mask", |
| "avx512.mask.psll.d" => "__builtin_ia32_pslld512_mask", |
| "avx512.mask.psll.d.128" => "__builtin_ia32_pslld128_mask", |
| "avx512.mask.psll.d.256" => "__builtin_ia32_pslld256_mask", |
| "avx512.mask.psll.di.128" => "__builtin_ia32_pslldi128_mask", |
| "avx512.mask.psll.di.256" => "__builtin_ia32_pslldi256_mask", |
| "avx512.mask.psll.di.512" => "__builtin_ia32_pslldi512_mask", |
| "avx512.mask.psll.q" => "__builtin_ia32_psllq512_mask", |
| "avx512.mask.psll.q.128" => "__builtin_ia32_psllq128_mask", |
| "avx512.mask.psll.q.256" => "__builtin_ia32_psllq256_mask", |
| "avx512.mask.psll.qi.128" => "__builtin_ia32_psllqi128_mask", |
| "avx512.mask.psll.qi.256" => "__builtin_ia32_psllqi256_mask", |
| "avx512.mask.psll.qi.512" => "__builtin_ia32_psllqi512_mask", |
| "avx512.mask.psll.w.128" => "__builtin_ia32_psllw128_mask", |
| "avx512.mask.psll.w.256" => "__builtin_ia32_psllw256_mask", |
| "avx512.mask.psll.w.512" => "__builtin_ia32_psllw512_mask", |
| "avx512.mask.psll.wi.128" => "__builtin_ia32_psllwi128_mask", |
| "avx512.mask.psll.wi.256" => "__builtin_ia32_psllwi256_mask", |
| "avx512.mask.psll.wi.512" => "__builtin_ia32_psllwi512_mask", |
| "avx512.mask.psllv.d" => "__builtin_ia32_psllv16si_mask", |
| "avx512.mask.psllv.q" => "__builtin_ia32_psllv8di_mask", |
| "avx512.mask.psllv16.hi" => "__builtin_ia32_psllv16hi_mask", |
| "avx512.mask.psllv2.di" => "__builtin_ia32_psllv2di_mask", |
| "avx512.mask.psllv32hi" => "__builtin_ia32_psllv32hi_mask", |
| "avx512.mask.psllv4.di" => "__builtin_ia32_psllv4di_mask", |
| "avx512.mask.psllv4.si" => "__builtin_ia32_psllv4si_mask", |
| "avx512.mask.psllv8.hi" => "__builtin_ia32_psllv8hi_mask", |
| "avx512.mask.psllv8.si" => "__builtin_ia32_psllv8si_mask", |
| "avx512.mask.psra.d" => "__builtin_ia32_psrad512_mask", |
| "avx512.mask.psra.d.128" => "__builtin_ia32_psrad128_mask", |
| "avx512.mask.psra.d.256" => "__builtin_ia32_psrad256_mask", |
| "avx512.mask.psra.di.128" => "__builtin_ia32_psradi128_mask", |
| "avx512.mask.psra.di.256" => "__builtin_ia32_psradi256_mask", |
| "avx512.mask.psra.di.512" => "__builtin_ia32_psradi512_mask", |
| "avx512.mask.psra.q" => "__builtin_ia32_psraq512_mask", |
| "avx512.mask.psra.q.128" => "__builtin_ia32_psraq128_mask", |
| "avx512.mask.psra.q.256" => "__builtin_ia32_psraq256_mask", |
| "avx512.mask.psra.qi.128" => "__builtin_ia32_psraqi128_mask", |
| "avx512.mask.psra.qi.256" => "__builtin_ia32_psraqi256_mask", |
| "avx512.mask.psra.qi.512" => "__builtin_ia32_psraqi512_mask", |
| "avx512.mask.psra.w.128" => "__builtin_ia32_psraw128_mask", |
| "avx512.mask.psra.w.256" => "__builtin_ia32_psraw256_mask", |
| "avx512.mask.psra.w.512" => "__builtin_ia32_psraw512_mask", |
| "avx512.mask.psra.wi.128" => "__builtin_ia32_psrawi128_mask", |
| "avx512.mask.psra.wi.256" => "__builtin_ia32_psrawi256_mask", |
| "avx512.mask.psra.wi.512" => "__builtin_ia32_psrawi512_mask", |
| "avx512.mask.psrav.d" => "__builtin_ia32_psrav16si_mask", |
| "avx512.mask.psrav.q" => "__builtin_ia32_psrav8di_mask", |
| "avx512.mask.psrav.q.128" => "__builtin_ia32_psravq128_mask", |
| "avx512.mask.psrav.q.256" => "__builtin_ia32_psravq256_mask", |
| "avx512.mask.psrav16.hi" => "__builtin_ia32_psrav16hi_mask", |
| "avx512.mask.psrav32.hi" => "__builtin_ia32_psrav32hi_mask", |
| "avx512.mask.psrav4.si" => "__builtin_ia32_psrav4si_mask", |
| "avx512.mask.psrav8.hi" => "__builtin_ia32_psrav8hi_mask", |
| "avx512.mask.psrav8.si" => "__builtin_ia32_psrav8si_mask", |
| "avx512.mask.psrl.d" => "__builtin_ia32_psrld512_mask", |
| "avx512.mask.psrl.d.128" => "__builtin_ia32_psrld128_mask", |
| "avx512.mask.psrl.d.256" => "__builtin_ia32_psrld256_mask", |
| "avx512.mask.psrl.di.128" => "__builtin_ia32_psrldi128_mask", |
| "avx512.mask.psrl.di.256" => "__builtin_ia32_psrldi256_mask", |
| "avx512.mask.psrl.di.512" => "__builtin_ia32_psrldi512_mask", |
| "avx512.mask.psrl.q" => "__builtin_ia32_psrlq512_mask", |
| "avx512.mask.psrl.q.128" => "__builtin_ia32_psrlq128_mask", |
| "avx512.mask.psrl.q.256" => "__builtin_ia32_psrlq256_mask", |
| "avx512.mask.psrl.qi.128" => "__builtin_ia32_psrlqi128_mask", |
| "avx512.mask.psrl.qi.256" => "__builtin_ia32_psrlqi256_mask", |
| "avx512.mask.psrl.qi.512" => "__builtin_ia32_psrlqi512_mask", |
| "avx512.mask.psrl.w.128" => "__builtin_ia32_psrlw128_mask", |
| "avx512.mask.psrl.w.256" => "__builtin_ia32_psrlw256_mask", |
| "avx512.mask.psrl.w.512" => "__builtin_ia32_psrlw512_mask", |
| "avx512.mask.psrl.wi.128" => "__builtin_ia32_psrlwi128_mask", |
| "avx512.mask.psrl.wi.256" => "__builtin_ia32_psrlwi256_mask", |
| "avx512.mask.psrl.wi.512" => "__builtin_ia32_psrlwi512_mask", |
| "avx512.mask.psrlv.d" => "__builtin_ia32_psrlv16si_mask", |
| "avx512.mask.psrlv.q" => "__builtin_ia32_psrlv8di_mask", |
| "avx512.mask.psrlv16.hi" => "__builtin_ia32_psrlv16hi_mask", |
| "avx512.mask.psrlv2.di" => "__builtin_ia32_psrlv2di_mask", |
| "avx512.mask.psrlv32hi" => "__builtin_ia32_psrlv32hi_mask", |
| "avx512.mask.psrlv4.di" => "__builtin_ia32_psrlv4di_mask", |
| "avx512.mask.psrlv4.si" => "__builtin_ia32_psrlv4si_mask", |
| "avx512.mask.psrlv8.hi" => "__builtin_ia32_psrlv8hi_mask", |
| "avx512.mask.psrlv8.si" => "__builtin_ia32_psrlv8si_mask", |
| "avx512.mask.psub.b.128" => "__builtin_ia32_psubb128_mask", |
| "avx512.mask.psub.b.256" => "__builtin_ia32_psubb256_mask", |
| "avx512.mask.psub.b.512" => "__builtin_ia32_psubb512_mask", |
| "avx512.mask.psub.d.128" => "__builtin_ia32_psubd128_mask", |
| "avx512.mask.psub.d.256" => "__builtin_ia32_psubd256_mask", |
| "avx512.mask.psub.d.512" => "__builtin_ia32_psubd512_mask", |
| "avx512.mask.psub.q.128" => "__builtin_ia32_psubq128_mask", |
| "avx512.mask.psub.q.256" => "__builtin_ia32_psubq256_mask", |
| "avx512.mask.psub.q.512" => "__builtin_ia32_psubq512_mask", |
| "avx512.mask.psub.w.128" => "__builtin_ia32_psubw128_mask", |
| "avx512.mask.psub.w.256" => "__builtin_ia32_psubw256_mask", |
| "avx512.mask.psub.w.512" => "__builtin_ia32_psubw512_mask", |
| "avx512.mask.psubs.b.128" => "__builtin_ia32_psubsb128_mask", |
| "avx512.mask.psubs.b.256" => "__builtin_ia32_psubsb256_mask", |
| "avx512.mask.psubs.b.512" => "__builtin_ia32_psubsb512_mask", |
| "avx512.mask.psubs.w.128" => "__builtin_ia32_psubsw128_mask", |
| "avx512.mask.psubs.w.256" => "__builtin_ia32_psubsw256_mask", |
| "avx512.mask.psubs.w.512" => "__builtin_ia32_psubsw512_mask", |
| "avx512.mask.psubus.b.128" => "__builtin_ia32_psubusb128_mask", |
| "avx512.mask.psubus.b.256" => "__builtin_ia32_psubusb256_mask", |
| "avx512.mask.psubus.b.512" => "__builtin_ia32_psubusb512_mask", |
| "avx512.mask.psubus.w.128" => "__builtin_ia32_psubusw128_mask", |
| "avx512.mask.psubus.w.256" => "__builtin_ia32_psubusw256_mask", |
| "avx512.mask.psubus.w.512" => "__builtin_ia32_psubusw512_mask", |
| "avx512.mask.pternlog.d.128" => "__builtin_ia32_pternlogd128_mask", |
| "avx512.mask.pternlog.d.256" => "__builtin_ia32_pternlogd256_mask", |
| "avx512.mask.pternlog.d.512" => "__builtin_ia32_pternlogd512_mask", |
| "avx512.mask.pternlog.q.128" => "__builtin_ia32_pternlogq128_mask", |
| "avx512.mask.pternlog.q.256" => "__builtin_ia32_pternlogq256_mask", |
| "avx512.mask.pternlog.q.512" => "__builtin_ia32_pternlogq512_mask", |
| "avx512.mask.ptestm.d.512" => "__builtin_ia32_ptestmd512", |
| "avx512.mask.ptestm.q.512" => "__builtin_ia32_ptestmq512", |
| "avx512.mask.shuf.f32x4" => "__builtin_ia32_shuf_f32x4_mask", |
| "avx512.mask.shuf.f32x4.256" => "__builtin_ia32_shuf_f32x4_256_mask", |
| "avx512.mask.shuf.f64x2" => "__builtin_ia32_shuf_f64x2_mask", |
| "avx512.mask.shuf.f64x2.256" => "__builtin_ia32_shuf_f64x2_256_mask", |
| "avx512.mask.shuf.i32x4" => "__builtin_ia32_shuf_i32x4_mask", |
| "avx512.mask.shuf.i32x4.256" => "__builtin_ia32_shuf_i32x4_256_mask", |
| "avx512.mask.shuf.i64x2" => "__builtin_ia32_shuf_i64x2_mask", |
| "avx512.mask.shuf.i64x2.256" => "__builtin_ia32_shuf_i64x2_256_mask", |
| "avx512.mask.shuf.pd.128" => "__builtin_ia32_shufpd128_mask", |
| "avx512.mask.shuf.pd.256" => "__builtin_ia32_shufpd256_mask", |
| "avx512.mask.shuf.pd.512" => "__builtin_ia32_shufpd512_mask", |
| "avx512.mask.shuf.ps.128" => "__builtin_ia32_shufps128_mask", |
| "avx512.mask.shuf.ps.256" => "__builtin_ia32_shufps256_mask", |
| "avx512.mask.shuf.ps.512" => "__builtin_ia32_shufps512_mask", |
| "avx512.mask.sqrt.pd.128" => "__builtin_ia32_sqrtpd128_mask", |
| "avx512.mask.sqrt.pd.256" => "__builtin_ia32_sqrtpd256_mask", |
| "avx512.mask.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask", |
| "avx512.mask.sqrt.ps.128" => "__builtin_ia32_sqrtps128_mask", |
| "avx512.mask.sqrt.ps.256" => "__builtin_ia32_sqrtps256_mask", |
| "avx512.mask.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask", |
| "avx512.mask.store.ss" => "__builtin_ia32_storess_mask", |
| "avx512.mask.storeu.d.512" => "__builtin_ia32_storedqusi512_mask", |
| "avx512.mask.storeu.pd.512" => "__builtin_ia32_storeupd512_mask", |
| "avx512.mask.storeu.ps.512" => "__builtin_ia32_storeups512_mask", |
| "avx512.mask.storeu.q.512" => "__builtin_ia32_storedqudi512_mask", |
| "avx512.mask.sub.pd.128" => "__builtin_ia32_subpd128_mask", |
| "avx512.mask.sub.pd.256" => "__builtin_ia32_subpd256_mask", |
| "avx512.mask.sub.pd.512" => "__builtin_ia32_subpd512_mask", |
| "avx512.mask.sub.ps.128" => "__builtin_ia32_subps128_mask", |
| "avx512.mask.sub.ps.256" => "__builtin_ia32_subps256_mask", |
| "avx512.mask.sub.ps.512" => "__builtin_ia32_subps512_mask", |
| "avx512.mask.valign.d.128" => "__builtin_ia32_alignd128_mask", |
| "avx512.mask.valign.d.256" => "__builtin_ia32_alignd256_mask", |
| "avx512.mask.valign.d.512" => "__builtin_ia32_alignd512_mask", |
| "avx512.mask.valign.q.128" => "__builtin_ia32_alignq128_mask", |
| "avx512.mask.valign.q.256" => "__builtin_ia32_alignq256_mask", |
| "avx512.mask.valign.q.512" => "__builtin_ia32_alignq512_mask", |
| "avx512.mask.vcvtph2ps.128" => "__builtin_ia32_vcvtph2ps_mask", |
| "avx512.mask.vcvtph2ps.256" => "__builtin_ia32_vcvtph2ps256_mask", |
| "avx512.mask.vcvtph2ps.512" => "__builtin_ia32_vcvtph2ps512_mask", |
| "avx512.mask.vextractf32x4.256" => "__builtin_ia32_extractf32x4_256_mask", |
| "avx512.mask.vextractf32x4.512" => "__builtin_ia32_extractf32x4_mask", |
| "avx512.mask.vextractf32x8.512" => "__builtin_ia32_extractf32x8_mask", |
| "avx512.mask.vextractf64x2.256" => "__builtin_ia32_extractf64x2_256_mask", |
| "avx512.mask.vextractf64x2.512" => "__builtin_ia32_extractf64x2_512_mask", |
| "avx512.mask.vextractf64x4.512" => "__builtin_ia32_extractf64x4_mask", |
| "avx512.mask.vextracti32x4.256" => "__builtin_ia32_extracti32x4_256_mask", |
| "avx512.mask.vextracti32x4.512" => "__builtin_ia32_extracti32x4_mask", |
| "avx512.mask.vextracti32x8.512" => "__builtin_ia32_extracti32x8_mask", |
| "avx512.mask.vextracti64x2.256" => "__builtin_ia32_extracti64x2_256_mask", |
| "avx512.mask.vextracti64x2.512" => "__builtin_ia32_extracti64x2_512_mask", |
| "avx512.mask.vextracti64x4.512" => "__builtin_ia32_extracti64x4_mask", |
| "avx512.mask.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask", |
| "avx512.mask.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask", |
| "avx512.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask", |
| "avx512.mask.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask", |
| "avx512.mask.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask", |
| "avx512.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask", |
| "avx512.mask.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask", |
| "avx512.mask.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask", |
| "avx512.mask.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask", |
| "avx512.mask.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask", |
| "avx512.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask", |
| "avx512.mask.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask", |
| "avx512.mask.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask", |
| "avx512.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask", |
| "avx512.mask.vfnmadd.pd.128" => "__builtin_ia32_vfnmaddpd128_mask", |
| "avx512.mask.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256_mask", |
| "avx512.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask", |
| "avx512.mask.vfnmadd.ps.128" => "__builtin_ia32_vfnmaddps128_mask", |
| "avx512.mask.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256_mask", |
| "avx512.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask", |
| "avx512.mask.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask", |
| "avx512.mask.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask", |
| "avx512.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask", |
| "avx512.mask.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask", |
| "avx512.mask.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask", |
| "avx512.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask", |
| "avx512.mask.vpermi2var.d.128" => "__builtin_ia32_vpermi2vard128_mask", |
| "avx512.mask.vpermi2var.d.256" => "__builtin_ia32_vpermi2vard256_mask", |
| "avx512.mask.vpermi2var.d.512" => "__builtin_ia32_vpermi2vard512_mask", |
| "avx512.mask.vpermi2var.hi.128" => "__builtin_ia32_vpermi2varhi128_mask", |
| "avx512.mask.vpermi2var.hi.256" => "__builtin_ia32_vpermi2varhi256_mask", |
| "avx512.mask.vpermi2var.hi.512" => "__builtin_ia32_vpermi2varhi512_mask", |
| "avx512.mask.vpermi2var.pd.128" => "__builtin_ia32_vpermi2varpd128_mask", |
| "avx512.mask.vpermi2var.pd.256" => "__builtin_ia32_vpermi2varpd256_mask", |
| "avx512.mask.vpermi2var.pd.512" => "__builtin_ia32_vpermi2varpd512_mask", |
| "avx512.mask.vpermi2var.ps.128" => "__builtin_ia32_vpermi2varps128_mask", |
| "avx512.mask.vpermi2var.ps.256" => "__builtin_ia32_vpermi2varps256_mask", |
| "avx512.mask.vpermi2var.ps.512" => "__builtin_ia32_vpermi2varps512_mask", |
| "avx512.mask.vpermi2var.q.128" => "__builtin_ia32_vpermi2varq128_mask", |
| "avx512.mask.vpermi2var.q.256" => "__builtin_ia32_vpermi2varq256_mask", |
| "avx512.mask.vpermi2var.q.512" => "__builtin_ia32_vpermi2varq512_mask", |
| "avx512.mask.vpermi2var.qi.128" => "__builtin_ia32_vpermi2varqi128_mask", |
| "avx512.mask.vpermi2var.qi.256" => "__builtin_ia32_vpermi2varqi256_mask", |
| "avx512.mask.vpermi2var.qi.512" => "__builtin_ia32_vpermi2varqi512_mask", |
| "avx512.mask.vpermilvar.pd.128" => "__builtin_ia32_vpermilvarpd_mask", |
| "avx512.mask.vpermilvar.pd.256" => "__builtin_ia32_vpermilvarpd256_mask", |
| "avx512.mask.vpermilvar.pd.512" => "__builtin_ia32_vpermilvarpd512_mask", |
| "avx512.mask.vpermilvar.ps.128" => "__builtin_ia32_vpermilvarps_mask", |
| "avx512.mask.vpermilvar.ps.256" => "__builtin_ia32_vpermilvarps256_mask", |
| "avx512.mask.vpermilvar.ps.512" => "__builtin_ia32_vpermilvarps512_mask", |
| "avx512.mask.vpermt.d.512" => "__builtin_ia32_vpermt2vard512_mask", |
| "avx512.mask.vpermt.pd.512" => "__builtin_ia32_vpermt2varpd512_mask", |
| "avx512.mask.vpermt.ps.512" => "__builtin_ia32_vpermt2varps512_mask", |
| "avx512.mask.vpermt.q.512" => "__builtin_ia32_vpermt2varq512_mask", |
| "avx512.mask.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_mask", |
| "avx512.mask.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_mask", |
| "avx512.mask.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_mask", |
| "avx512.mask.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_mask", |
| "avx512.mask.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_mask", |
| "avx512.mask.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_mask", |
| "avx512.mask.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_mask", |
| "avx512.mask.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_mask", |
| "avx512.mask.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_mask", |
| "avx512.mask.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_mask", |
| "avx512.mask.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_mask", |
| "avx512.mask.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_mask", |
| "avx512.mask.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_mask", |
| "avx512.mask.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_mask", |
| "avx512.mask.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_mask", |
| "avx512.mask.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_mask", |
| "avx512.mask.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_mask", |
| "avx512.mask.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_mask", |
| "avx512.mask.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_mask", |
| "avx512.mask.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_mask", |
| "avx512.mask.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_mask", |
| "avx512.mask.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_mask", |
| "avx512.mask.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_mask", |
| "avx512.mask.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_mask", |
| "avx512.mask.xor.pd.128" => "__builtin_ia32_xorpd128_mask", |
| "avx512.mask.xor.pd.256" => "__builtin_ia32_xorpd256_mask", |
| "avx512.mask.xor.pd.512" => "__builtin_ia32_xorpd512_mask", |
| "avx512.mask.xor.ps.128" => "__builtin_ia32_xorps128_mask", |
| "avx512.mask.xor.ps.256" => "__builtin_ia32_xorps256_mask", |
| "avx512.mask.xor.ps.512" => "__builtin_ia32_xorps512_mask", |
| "avx512.mask3.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_mask3", |
| "avx512.mask3.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_mask3", |
| "avx512.mask3.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask3", |
| "avx512.mask3.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_mask3", |
| "avx512.mask3.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_mask3", |
| "avx512.mask3.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask3", |
| "avx512.mask3.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_mask3", |
| "avx512.mask3.vfmadd.ss" => "__builtin_ia32_vfmaddss3_mask3", |
| "avx512.mask3.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_mask3", |
| "avx512.mask3.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_mask3", |
| "avx512.mask3.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask3", |
| "avx512.mask3.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_mask3", |
| "avx512.mask3.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_mask3", |
| "avx512.mask3.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask3", |
| "avx512.mask3.vfmsub.pd.128" => "__builtin_ia32_vfmsubpd128_mask3", |
| "avx512.mask3.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256_mask3", |
| "avx512.mask3.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask3", |
| "avx512.mask3.vfmsub.ps.128" => "__builtin_ia32_vfmsubps128_mask3", |
| "avx512.mask3.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256_mask3", |
| "avx512.mask3.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask3", |
| "avx512.mask3.vfmsubadd.pd.128" => "__builtin_ia32_vfmsubaddpd128_mask3", |
| "avx512.mask3.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256_mask3", |
| "avx512.mask3.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask3", |
| "avx512.mask3.vfmsubadd.ps.128" => "__builtin_ia32_vfmsubaddps128_mask3", |
| "avx512.mask3.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256_mask3", |
| "avx512.mask3.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask3", |
| "avx512.mask3.vfnmsub.pd.128" => "__builtin_ia32_vfnmsubpd128_mask3", |
| "avx512.mask3.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256_mask3", |
| "avx512.mask3.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask3", |
| "avx512.mask3.vfnmsub.ps.128" => "__builtin_ia32_vfnmsubps128_mask3", |
| "avx512.mask3.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256_mask3", |
| "avx512.mask3.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask3", |
| "avx512.maskz.pternlog.d.128" => "__builtin_ia32_pternlogd128_maskz", |
| "avx512.maskz.pternlog.d.256" => "__builtin_ia32_pternlogd256_maskz", |
| "avx512.maskz.pternlog.d.512" => "__builtin_ia32_pternlogd512_maskz", |
| "avx512.maskz.pternlog.q.128" => "__builtin_ia32_pternlogq128_maskz", |
| "avx512.maskz.pternlog.q.256" => "__builtin_ia32_pternlogq256_maskz", |
| "avx512.maskz.pternlog.q.512" => "__builtin_ia32_pternlogq512_maskz", |
| "avx512.maskz.vfmadd.pd.128" => "__builtin_ia32_vfmaddpd128_maskz", |
| "avx512.maskz.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256_maskz", |
| "avx512.maskz.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_maskz", |
| "avx512.maskz.vfmadd.ps.128" => "__builtin_ia32_vfmaddps128_maskz", |
| "avx512.maskz.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256_maskz", |
| "avx512.maskz.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_maskz", |
| "avx512.maskz.vfmadd.sd" => "__builtin_ia32_vfmaddsd3_maskz", |
| "avx512.maskz.vfmadd.ss" => "__builtin_ia32_vfmaddss3_maskz", |
| "avx512.maskz.vfmaddsub.pd.128" => "__builtin_ia32_vfmaddsubpd128_maskz", |
| "avx512.maskz.vfmaddsub.pd.256" => "__builtin_ia32_vfmaddsubpd256_maskz", |
| "avx512.maskz.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_maskz", |
| "avx512.maskz.vfmaddsub.ps.128" => "__builtin_ia32_vfmaddsubps128_maskz", |
| "avx512.maskz.vfmaddsub.ps.256" => "__builtin_ia32_vfmaddsubps256_maskz", |
| "avx512.maskz.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_maskz", |
| "avx512.maskz.vpermt2var.d.128" => "__builtin_ia32_vpermt2vard128_maskz", |
| "avx512.maskz.vpermt2var.d.256" => "__builtin_ia32_vpermt2vard256_maskz", |
| "avx512.maskz.vpermt2var.d.512" => "__builtin_ia32_vpermt2vard512_maskz", |
| "avx512.maskz.vpermt2var.hi.128" => "__builtin_ia32_vpermt2varhi128_maskz", |
| "avx512.maskz.vpermt2var.hi.256" => "__builtin_ia32_vpermt2varhi256_maskz", |
| "avx512.maskz.vpermt2var.hi.512" => "__builtin_ia32_vpermt2varhi512_maskz", |
| "avx512.maskz.vpermt2var.pd.128" => "__builtin_ia32_vpermt2varpd128_maskz", |
| "avx512.maskz.vpermt2var.pd.256" => "__builtin_ia32_vpermt2varpd256_maskz", |
| "avx512.maskz.vpermt2var.pd.512" => "__builtin_ia32_vpermt2varpd512_maskz", |
| "avx512.maskz.vpermt2var.ps.128" => "__builtin_ia32_vpermt2varps128_maskz", |
| "avx512.maskz.vpermt2var.ps.256" => "__builtin_ia32_vpermt2varps256_maskz", |
| "avx512.maskz.vpermt2var.ps.512" => "__builtin_ia32_vpermt2varps512_maskz", |
| "avx512.maskz.vpermt2var.q.128" => "__builtin_ia32_vpermt2varq128_maskz", |
| "avx512.maskz.vpermt2var.q.256" => "__builtin_ia32_vpermt2varq256_maskz", |
| "avx512.maskz.vpermt2var.q.512" => "__builtin_ia32_vpermt2varq512_maskz", |
| "avx512.maskz.vpermt2var.qi.128" => "__builtin_ia32_vpermt2varqi128_maskz", |
| "avx512.maskz.vpermt2var.qi.256" => "__builtin_ia32_vpermt2varqi256_maskz", |
| "avx512.maskz.vpermt2var.qi.512" => "__builtin_ia32_vpermt2varqi512_maskz", |
| "avx512.maskz.vpmadd52h.uq.128" => "__builtin_ia32_vpmadd52huq128_maskz", |
| "avx512.maskz.vpmadd52h.uq.256" => "__builtin_ia32_vpmadd52huq256_maskz", |
| "avx512.maskz.vpmadd52h.uq.512" => "__builtin_ia32_vpmadd52huq512_maskz", |
| "avx512.maskz.vpmadd52l.uq.128" => "__builtin_ia32_vpmadd52luq128_maskz", |
| "avx512.maskz.vpmadd52l.uq.256" => "__builtin_ia32_vpmadd52luq256_maskz", |
| "avx512.maskz.vpmadd52l.uq.512" => "__builtin_ia32_vpmadd52luq512_maskz", |
| "avx512.movntdqa" => "__builtin_ia32_movntdqa512", |
| "avx512.pbroadcastd.512" => "__builtin_ia32_pbroadcastd512", |
| "avx512.pbroadcastq.512" => "__builtin_ia32_pbroadcastq512", |
| "avx512.pmovzxbd" => "__builtin_ia32_pmovzxbd512", |
| "avx512.pmovzxbq" => "__builtin_ia32_pmovzxbq512", |
| "avx512.pmovzxdq" => "__builtin_ia32_pmovzxdq512", |
| "avx512.pmovzxwd" => "__builtin_ia32_pmovzxwd512", |
| "avx512.pmovzxwq" => "__builtin_ia32_pmovzxwq512", |
| "avx512.psll.dq" => "__builtin_ia32_pslldqi512", |
| "avx512.psll.dq.bs" => "__builtin_ia32_pslldqi512_byteshift", |
| "avx512.psrl.dq" => "__builtin_ia32_psrldqi512", |
| "avx512.psrl.dq.bs" => "__builtin_ia32_psrldqi512_byteshift", |
| "avx512.ptestm.b.128" => "__builtin_ia32_ptestmb128", |
| "avx512.ptestm.b.256" => "__builtin_ia32_ptestmb256", |
| "avx512.ptestm.b.512" => "__builtin_ia32_ptestmb512", |
| "avx512.ptestm.d.128" => "__builtin_ia32_ptestmd128", |
| "avx512.ptestm.d.256" => "__builtin_ia32_ptestmd256", |
| "avx512.ptestm.d.512" => "__builtin_ia32_ptestmd512", |
| "avx512.ptestm.q.128" => "__builtin_ia32_ptestmq128", |
| "avx512.ptestm.q.256" => "__builtin_ia32_ptestmq256", |
| "avx512.ptestm.q.512" => "__builtin_ia32_ptestmq512", |
| "avx512.ptestm.w.128" => "__builtin_ia32_ptestmw128", |
| "avx512.ptestm.w.256" => "__builtin_ia32_ptestmw256", |
| "avx512.ptestm.w.512" => "__builtin_ia32_ptestmw512", |
| "avx512.ptestnm.b.128" => "__builtin_ia32_ptestnmb128", |
| "avx512.ptestnm.b.256" => "__builtin_ia32_ptestnmb256", |
| "avx512.ptestnm.b.512" => "__builtin_ia32_ptestnmb512", |
| "avx512.ptestnm.d.128" => "__builtin_ia32_ptestnmd128", |
| "avx512.ptestnm.d.256" => "__builtin_ia32_ptestnmd256", |
| "avx512.ptestnm.d.512" => "__builtin_ia32_ptestnmd512", |
| "avx512.ptestnm.q.128" => "__builtin_ia32_ptestnmq128", |
| "avx512.ptestnm.q.256" => "__builtin_ia32_ptestnmq256", |
| "avx512.ptestnm.q.512" => "__builtin_ia32_ptestnmq512", |
| "avx512.ptestnm.w.128" => "__builtin_ia32_ptestnmw128", |
| "avx512.ptestnm.w.256" => "__builtin_ia32_ptestnmw256", |
| "avx512.ptestnm.w.512" => "__builtin_ia32_ptestnmw512", |
| "avx512.rcp28.pd" => "__builtin_ia32_rcp28pd_mask", |
| "avx512.rcp28.ps" => "__builtin_ia32_rcp28ps_mask", |
| "avx512.rcp28.sd" => "__builtin_ia32_rcp28sd_mask", |
| "avx512.rcp28.ss" => "__builtin_ia32_rcp28ss_mask", |
| "avx512.rndscale.sd" => "__builtin_ia32_rndscalesd", |
| "avx512.rndscale.ss" => "__builtin_ia32_rndscaless", |
| "avx512.rsqrt28.pd" => "__builtin_ia32_rsqrt28pd_mask", |
| "avx512.rsqrt28.ps" => "__builtin_ia32_rsqrt28ps_mask", |
| "avx512.rsqrt28.sd" => "__builtin_ia32_rsqrt28sd_mask", |
| "avx512.rsqrt28.ss" => "__builtin_ia32_rsqrt28ss_mask", |
| "avx512.scatter.dpd.512" => "__builtin_ia32_scattersiv8df", |
| "avx512.scatter.dpi.512" => "__builtin_ia32_scattersiv16si", |
| "avx512.scatter.dpq.512" => "__builtin_ia32_scattersiv8di", |
| "avx512.scatter.dps.512" => "__builtin_ia32_scattersiv16sf", |
| "avx512.scatter.qpd.512" => "__builtin_ia32_scatterdiv8df", |
| "avx512.scatter.qpi.512" => "__builtin_ia32_scatterdiv16si", |
| "avx512.scatter.qpq.512" => "__builtin_ia32_scatterdiv8di", |
| "avx512.scatter.qps.512" => "__builtin_ia32_scatterdiv16sf", |
| "avx512.scatterdiv2.df" => "__builtin_ia32_scatterdiv2df", |
| "avx512.scatterdiv2.di" => "__builtin_ia32_scatterdiv2di", |
| "avx512.scatterdiv4.df" => "__builtin_ia32_scatterdiv4df", |
| "avx512.scatterdiv4.di" => "__builtin_ia32_scatterdiv4di", |
| "avx512.scatterdiv4.sf" => "__builtin_ia32_scatterdiv4sf", |
| "avx512.scatterdiv4.si" => "__builtin_ia32_scatterdiv4si", |
| "avx512.scatterdiv8.sf" => "__builtin_ia32_scatterdiv8sf", |
| "avx512.scatterdiv8.si" => "__builtin_ia32_scatterdiv8si", |
| "avx512.scatterpf.dpd.512" => "__builtin_ia32_scatterpfdpd", |
| "avx512.scatterpf.dps.512" => "__builtin_ia32_scatterpfdps", |
| "avx512.scatterpf.qpd.512" => "__builtin_ia32_scatterpfqpd", |
| "avx512.scatterpf.qps.512" => "__builtin_ia32_scatterpfqps", |
| "avx512.scattersiv2.df" => "__builtin_ia32_scattersiv2df", |
| "avx512.scattersiv2.di" => "__builtin_ia32_scattersiv2di", |
| "avx512.scattersiv4.df" => "__builtin_ia32_scattersiv4df", |
| "avx512.scattersiv4.di" => "__builtin_ia32_scattersiv4di", |
| "avx512.scattersiv4.sf" => "__builtin_ia32_scattersiv4sf", |
| "avx512.scattersiv4.si" => "__builtin_ia32_scattersiv4si", |
| "avx512.scattersiv8.sf" => "__builtin_ia32_scattersiv8sf", |
| "avx512.scattersiv8.si" => "__builtin_ia32_scattersiv8si", |
| "avx512.sqrt.pd.512" => "__builtin_ia32_sqrtpd512_mask", |
| "avx512.sqrt.ps.512" => "__builtin_ia32_sqrtps512_mask", |
| "avx512.sqrt.sd" => "__builtin_ia32_sqrtrndsd", |
| "avx512.sqrt.ss" => "__builtin_ia32_sqrtrndss", |
| "avx512.vbroadcast.sd.512" => "__builtin_ia32_vbroadcastsd512", |
| "avx512.vbroadcast.sd.pd.512" => "__builtin_ia32_vbroadcastsd_pd512", |
| "avx512.vbroadcast.ss.512" => "__builtin_ia32_vbroadcastss512", |
| "avx512.vbroadcast.ss.ps.512" => "__builtin_ia32_vbroadcastss_ps512", |
| "fma.mask.vfmadd.pd.512" => "__builtin_ia32_vfmaddpd512_mask", |
| "fma.mask.vfmadd.ps.512" => "__builtin_ia32_vfmaddps512_mask", |
| "fma.mask.vfmaddsub.pd.512" => "__builtin_ia32_vfmaddsubpd512_mask", |
| "fma.mask.vfmaddsub.ps.512" => "__builtin_ia32_vfmaddsubps512_mask", |
| "fma.mask.vfmsub.pd.512" => "__builtin_ia32_vfmsubpd512_mask", |
| "fma.mask.vfmsub.ps.512" => "__builtin_ia32_vfmsubps512_mask", |
| "fma.mask.vfmsubadd.pd.512" => "__builtin_ia32_vfmsubaddpd512_mask", |
| "fma.mask.vfmsubadd.ps.512" => "__builtin_ia32_vfmsubaddps512_mask", |
| "fma.mask.vfnmadd.pd.512" => "__builtin_ia32_vfnmaddpd512_mask", |
| "fma.mask.vfnmadd.ps.512" => "__builtin_ia32_vfnmaddps512_mask", |
| "fma.mask.vfnmsub.pd.512" => "__builtin_ia32_vfnmsubpd512_mask", |
| "fma.mask.vfnmsub.ps.512" => "__builtin_ia32_vfnmsubps512_mask", |
| "fma.vfmadd.pd" => "__builtin_ia32_vfmaddpd", |
| "fma.vfmadd.pd.256" => "__builtin_ia32_vfmaddpd256", |
| "fma.vfmadd.ps" => "__builtin_ia32_vfmaddps", |
| "fma.vfmadd.ps.256" => "__builtin_ia32_vfmaddps256", |
| "fma.vfmadd.sd" => "__builtin_ia32_vfmaddsd", |
| "fma.vfmadd.ss" => "__builtin_ia32_vfmaddss", |
| "fma.vfmsub.pd" => "__builtin_ia32_vfmsubpd", |
| "fma.vfmsub.pd.256" => "__builtin_ia32_vfmsubpd256", |
| "fma.vfmsub.ps" => "__builtin_ia32_vfmsubps", |
| "fma.vfmsub.ps.256" => "__builtin_ia32_vfmsubps256", |
| "fma.vfmsub.sd" => "__builtin_ia32_vfmsubsd", |
| "fma.vfmsub.ss" => "__builtin_ia32_vfmsubss", |
| "fma.vfmsubadd.pd" => "__builtin_ia32_vfmsubaddpd", |
| "fma.vfmsubadd.pd.256" => "__builtin_ia32_vfmsubaddpd256", |
| "fma.vfmsubadd.ps" => "__builtin_ia32_vfmsubaddps", |
| "fma.vfmsubadd.ps.256" => "__builtin_ia32_vfmsubaddps256", |
| "fma.vfnmadd.pd" => "__builtin_ia32_vfnmaddpd", |
| "fma.vfnmadd.pd.256" => "__builtin_ia32_vfnmaddpd256", |
| "fma.vfnmadd.ps" => "__builtin_ia32_vfnmaddps", |
| "fma.vfnmadd.ps.256" => "__builtin_ia32_vfnmaddps256", |
| "fma.vfnmadd.sd" => "__builtin_ia32_vfnmaddsd", |
| "fma.vfnmadd.ss" => "__builtin_ia32_vfnmaddss", |
| "fma.vfnmsub.pd" => "__builtin_ia32_vfnmsubpd", |
| "fma.vfnmsub.pd.256" => "__builtin_ia32_vfnmsubpd256", |
| "fma.vfnmsub.ps" => "__builtin_ia32_vfnmsubps", |
| "fma.vfnmsub.ps.256" => "__builtin_ia32_vfnmsubps256", |
| "fma.vfnmsub.sd" => "__builtin_ia32_vfnmsubsd", |
| "fma.vfnmsub.ss" => "__builtin_ia32_vfnmsubss", |
| "mmx.femms" => "__builtin_ia32_femms", |
| "rdtscp" => "__builtin_ia32_rdtscp", |
| "sse.add.ss" => "__builtin_ia32_addss", |
| "sse.cmp.ps" => "__builtin_ia32_cmpps", |
| "sse.cvtsi2ss" => "__builtin_ia32_cvtsi2ss", |
| "sse.cvtsi642ss" => "__builtin_ia32_cvtsi642ss", |
| "sse.div.ss" => "__builtin_ia32_divss", |
| "sse.mul.ss" => "__builtin_ia32_mulss", |
| "sse.sqrt.ps" => "__builtin_ia32_sqrtps", |
| "sse.sqrt.ss" => "__builtin_ia32_sqrtss", |
| "sse.storeu.ps" => "__builtin_ia32_storeups", |
| "sse.sub.ss" => "__builtin_ia32_subss", |
| "sse2.add.sd" => "__builtin_ia32_addsd", |
| "sse2.cmp.pd" => "__builtin_ia32_cmppd", |
| "sse2.cvtdq2pd" => "__builtin_ia32_cvtdq2pd", |
| "sse2.cvtdq2ps" => "__builtin_ia32_cvtdq2ps", |
| "sse2.cvtps2pd" => "__builtin_ia32_cvtps2pd", |
| "sse2.cvtsi2sd" => "__builtin_ia32_cvtsi2sd", |
| "sse2.cvtsi642sd" => "__builtin_ia32_cvtsi642sd", |
| "sse2.cvtss2sd" => "__builtin_ia32_cvtss2sd", |
| "sse2.div.sd" => "__builtin_ia32_divsd", |
| "sse2.mul.sd" => "__builtin_ia32_mulsd", |
| "sse2.padds.b" => "__builtin_ia32_paddsb128", |
| "sse2.padds.w" => "__builtin_ia32_paddsw128", |
| "sse2.paddus.b" => "__builtin_ia32_paddusb128", |
| "sse2.paddus.w" => "__builtin_ia32_paddusw128", |
| "sse2.pmaxs.w" => "__builtin_ia32_pmaxsw128", |
| "sse2.pmaxu.b" => "__builtin_ia32_pmaxub128", |
| "sse2.pmins.w" => "__builtin_ia32_pminsw128", |
| "sse2.pminu.b" => "__builtin_ia32_pminub128", |
| "sse2.pmulu.dq" => "__builtin_ia32_pmuludq128", |
| "sse2.pshuf.d" => "__builtin_ia32_pshufd", |
| "sse2.pshufh.w" => "__builtin_ia32_pshufhw", |
| "sse2.pshufl.w" => "__builtin_ia32_pshuflw", |
| "sse2.psll.dq" => "__builtin_ia32_pslldqi128", |
| "sse2.psll.dq.bs" => "__builtin_ia32_pslldqi128_byteshift", |
| "sse2.psrl.dq" => "__builtin_ia32_psrldqi128", |
| "sse2.psrl.dq.bs" => "__builtin_ia32_psrldqi128_byteshift", |
| "sse2.psubs.b" => "__builtin_ia32_psubsb128", |
| "sse2.psubs.w" => "__builtin_ia32_psubsw128", |
| "sse2.psubus.b" => "__builtin_ia32_psubusb128", |
| "sse2.psubus.w" => "__builtin_ia32_psubusw128", |
| "sse2.sqrt.pd" => "__builtin_ia32_sqrtpd", |
| "sse2.sqrt.sd" => "__builtin_ia32_sqrtsd", |
| "sse2.storel.dq" => "__builtin_ia32_storelv4si", |
| "sse2.storeu.dq" => "__builtin_ia32_storedqu", |
| "sse2.storeu.pd" => "__builtin_ia32_storeupd", |
| "sse2.sub.sd" => "__builtin_ia32_subsd", |
| "sse41.blendpd" => "__builtin_ia32_blendpd", |
| "sse41.blendps" => "__builtin_ia32_blendps", |
| "sse41.extractps" => "__builtin_ia32_extractps128", |
| "sse41.movntdqa" => "__builtin_ia32_movntdqa", |
| "sse41.pblendw" => "__builtin_ia32_pblendw128", |
| "sse41.pmaxsb" => "__builtin_ia32_pmaxsb128", |
| "sse41.pmaxsd" => "__builtin_ia32_pmaxsd128", |
| "sse41.pmaxud" => "__builtin_ia32_pmaxud128", |
| "sse41.pmaxuw" => "__builtin_ia32_pmaxuw128", |
| "sse41.pminsb" => "__builtin_ia32_pminsb128", |
| "sse41.pminsd" => "__builtin_ia32_pminsd128", |
| "sse41.pminud" => "__builtin_ia32_pminud128", |
| "sse41.pminuw" => "__builtin_ia32_pminuw128", |
| "sse41.pmovsxbd" => "__builtin_ia32_pmovsxbd128", |
| "sse41.pmovsxbq" => "__builtin_ia32_pmovsxbq128", |
| "sse41.pmovsxbw" => "__builtin_ia32_pmovsxbw128", |
| "sse41.pmovsxdq" => "__builtin_ia32_pmovsxdq128", |
| "sse41.pmovsxwd" => "__builtin_ia32_pmovsxwd128", |
| "sse41.pmovsxwq" => "__builtin_ia32_pmovsxwq128", |
| "sse41.pmovzxbd" => "__builtin_ia32_pmovzxbd128", |
| "sse41.pmovzxbq" => "__builtin_ia32_pmovzxbq128", |
| "sse41.pmovzxbw" => "__builtin_ia32_pmovzxbw128", |
| "sse41.pmovzxdq" => "__builtin_ia32_pmovzxdq128", |
| "sse41.pmovzxwd" => "__builtin_ia32_pmovzxwd128", |
| "sse41.pmovzxwq" => "__builtin_ia32_pmovzxwq128", |
| "sse41.pmuldq" => "__builtin_ia32_pmuldq128", |
| "sse41.round.pd" => "__builtin_ia32_roundpd", |
| "sse41.round.ps" => "__builtin_ia32_roundps", |
| "sse41.round.sd" => "__builtin_ia32_roundsd", |
| "sse41.round.ss" => "__builtin_ia32_roundss", |
| "sse4a.movnt.sd" => "__builtin_ia32_movntsd", |
| "sse4a.movnt.ss" => "__builtin_ia32_movntss", |
| "ssse3.pabs.b.128" => "__builtin_ia32_pabsb128", |
| "ssse3.pabs.d.128" => "__builtin_ia32_pabsd128", |
| "ssse3.pabs.w.128" => "__builtin_ia32_pabsw128", |
| "subborrow.u32" => "__builtin_ia32_subborrow_u32", |
| "subborrow.u64" => "__builtin_ia32_subborrow_u64", |
| "xop.vpcmov" => "__builtin_ia32_vpcmov", |
| "xop.vpcmov.256" => "__builtin_ia32_vpcmov_256", |
| "xop.vpcomb" => "__builtin_ia32_vpcomb", |
| "xop.vpcomd" => "__builtin_ia32_vpcomd", |
| "xop.vpcomq" => "__builtin_ia32_vpcomq", |
| "xop.vpcomub" => "__builtin_ia32_vpcomub", |
| "xop.vpcomud" => "__builtin_ia32_vpcomud", |
| "xop.vpcomuq" => "__builtin_ia32_vpcomuq", |
| "xop.vpcomuw" => "__builtin_ia32_vpcomuw", |
| "xop.vpcomw" => "__builtin_ia32_vpcomw", |
| "xop.vprotb" => "__builtin_ia32_vprotb", |
| "xop.vprotbi" => "__builtin_ia32_vprotbi", |
| "xop.vprotd" => "__builtin_ia32_vprotd", |
| "xop.vprotdi" => "__builtin_ia32_vprotdi", |
| "xop.vprotq" => "__builtin_ia32_vprotq", |
| "xop.vprotqi" => "__builtin_ia32_vprotqi", |
| "xop.vprotw" => "__builtin_ia32_vprotw", |
| "xop.vprotwi" => "__builtin_ia32_vprotwi", |
| _ => return ArchCheckResult::UnknownIntrinsic, |
| }, |
| _ => return ArchCheckResult::UnknownArch, |
| }) |
| } |
