| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc < %s -mtriple=avr -mcpu=atmega328p | FileCheck %s |
| |
| define signext i16 @testmsws(float %x) { |
| ; CHECK-LABEL: testmsws: |
| ; CHECK: ; %bb.0: ; %entry |
| ; CHECK-NEXT: call lroundf |
| ; CHECK-NEXT: movw r24, r22 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = tail call i32 @llvm.lround.i32.f32(float %x) |
| %conv = trunc i32 %0 to i16 |
| ret i16 %conv |
| } |
| |
| define i32 @testmsxs(float %x) { |
| ; CHECK-LABEL: testmsxs: |
| ; CHECK: ; %bb.0: ; %entry |
| ; CHECK-NEXT: call lroundf |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = tail call i32 @llvm.lround.i32.f32(float %x) |
| ret i32 %0 |
| } |
| |
| define signext i16 @testmswd(double %x) { |
| ; CHECK-LABEL: testmswd: |
| ; CHECK: ; %bb.0: ; %entry |
| ; CHECK-NEXT: call lround |
| ; CHECK-NEXT: movw r24, r22 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = tail call i32 @llvm.lround.i32.f64(double %x) |
| %conv = trunc i32 %0 to i16 |
| ret i16 %conv |
| } |
| |
| define i32 @testmsxd(double %x) { |
| ; CHECK-LABEL: testmsxd: |
| ; CHECK: ; %bb.0: ; %entry |
| ; CHECK-NEXT: call lround |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = tail call i32 @llvm.lround.i32.f64(double %x) |
| ret i32 %0 |
| } |
| |
| declare i32 @llvm.lround.i32.f32(float) nounwind readnone |
| declare i32 @llvm.lround.i32.f64(double) nounwind readnone |