llvm/test/CodeGen/AVR/pseudo/ELPMBRdZ.mir

# RUN: llc -mtriple=avr -mattr=+elpm -mattr=+elpmx -start-before=greedy %s -o - \
# RUN:     | FileCheck %s
# RUN: llc -mtriple=avr -mattr=+elpm -mattr=-elpmx -start-before=greedy %s -o - \
# RUN:     | FileCheck --check-prefix=NOX %s

# This test checks the expansion of the 16-bit ELPM pseudo instruction and that
# the register allocator won't use R31R30 as an output register (which would
# lead to undefined behavior).

--- |
  target triple = "avr--"
  define void @test_elpmbrdz() {
  entry:
    ret void
  }
...

---
name:            test_elpmbrdz
tracksRegLiveness: true
body: |
  bb.0.entry:
    liveins: $r31r30

    ; CHECK-LABEL: test_elpmbrdz
    ; CHECK:       ; %bb.0:
    ; CHECK-NEXT:    ldi r24, 1
    ; CHECK-NEXT:    out
    ; CHECK-NEXT:    elpm r31, Z
    ; CHECK-NEXT:    ret

    ; NOX-LABEL:   test_elpmbrdz
    ; NOX:         ; %bb.0:
    ; NOX-NEXT:      ldi r24, 1
    ; NOX-NEXT:      out
    ; NOX-NEXT:      elpm
    ; NOX-NEXT:      mov r31, r0
    ; NOX-NEXT:      ret

    %1:zreg = COPY killed $r31r30
    %2:ld8 = LDIRdK 1
    %3:gpr8 = ELPMBRdZ %1, %2, implicit-def dead $r0
    $r31 = COPY %3
    RET implicit $r31
...