| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s |
| |
| ... |
| --- |
| name: s16 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $h0, $h1 |
| |
| ; CHECK-LABEL: name: s16 |
| ; CHECK: liveins: $h0, $h1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: %a:fpr16 = COPY $h0 |
| ; CHECK-NEXT: %b:fpr16 = COPY $h1 |
| ; CHECK-NEXT: %select_me:fpr16 = nofpexcept FMINHrr %a, %b |
| ; CHECK-NEXT: $h0 = COPY %select_me |
| ; CHECK-NEXT: RET_ReallyLR implicit $h0 |
| %a:fpr(s16) = COPY $h0 |
| %b:fpr(s16) = COPY $h1 |
| %select_me:fpr(s16) = G_FMINIMUM %a, %b |
| $h0 = COPY %select_me(s16) |
| RET_ReallyLR implicit $h0 |
| |
| ... |
| --- |
| name: s32 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $s0, $s1 |
| |
| ; CHECK-LABEL: name: s32 |
| ; CHECK: liveins: $s0, $s1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: %a:fpr32 = COPY $s0 |
| ; CHECK-NEXT: %b:fpr32 = COPY $s1 |
| ; CHECK-NEXT: %select_me:fpr32 = nofpexcept FMINSrr %a, %b |
| ; CHECK-NEXT: $s0 = COPY %select_me |
| ; CHECK-NEXT: RET_ReallyLR implicit $s0 |
| %a:fpr(s32) = COPY $s0 |
| %b:fpr(s32) = COPY $s1 |
| %select_me:fpr(s32) = G_FMINIMUM %a, %b |
| $s0 = COPY %select_me(s32) |
| RET_ReallyLR implicit $s0 |
| |
| ... |
| --- |
| name: s64 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $d0, $d1 |
| |
| ; CHECK-LABEL: name: s64 |
| ; CHECK: liveins: $d0, $d1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: %a:fpr64 = COPY $d0 |
| ; CHECK-NEXT: %b:fpr64 = COPY $d1 |
| ; CHECK-NEXT: %select_me:fpr64 = nofpexcept FMINDrr %a, %b |
| ; CHECK-NEXT: $d0 = COPY %select_me |
| ; CHECK-NEXT: RET_ReallyLR implicit $d0 |
| %a:fpr(s64) = COPY $d0 |
| %b:fpr(s64) = COPY $d1 |
| %select_me:fpr(s64) = G_FMINIMUM %a, %b |
| $d0 = COPY %select_me(s64) |
| RET_ReallyLR implicit $d0 |