| # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py |
| # RUN: llvm-mca -mtriple=thumbv8.1-m.main-none-none-eabi -mcpu=cortex-m55 -instruction-tables < %s | FileCheck %s |
| |
| vabd.f16 q0, q2, q1 |
| vabd.f32 q0, q2, q1 |
| vabs.f16 q0, q2 |
| vabs.f32 q0, q2 |
| vadd.f16 q0, q2, q1 |
| vadd.f32 q0, q2, q1 |
| vadd.f16 q0, q2, r0 |
| vadd.f32 q0, q2, r0 |
| vcadd.f16 q0, q2, q1, #90 |
| vcadd.f32 q0, q2, q1, #90 |
| vcmla.f16 q0, q2, q1, #90 |
| vcmla.f32 q0, q2, q1, #90 |
| vcmul.f16 q0, q2, q1, #90 |
| vcmul.f32 q0, q2, q1, #90 |
| vcvt.f16.s16 q0, q1, #4 |
| vcvt.f16.u16 q0, q1, #4 |
| vcvt.s16.f16 q0, q1, #4 |
| vcvt.u16.f16 q0, q1, #4 |
| vcvt.f32.s32 q0, q1, #4 |
| vcvt.f32.u32 q0, q1, #4 |
| vcvt.s32.f32 q0, q1, #4 |
| vcvt.u32.f32 q0, q1, #4 |
| vcvt.f16.s16 q0, q1 |
| vcvt.f32.s32 q0, q1 |
| vcvt.f16.u16 q0, q1 |
| vcvt.f32.u32 q0, q1 |
| vcvt.s16.f16 q0, q1 |
| vcvt.s32.f32 q0, q1 |
| vcvt.u16.f16 q0, q1 |
| vcvt.u32.f32 q0, q1 |
| vcvtb.f16.f32 q0, q1 |
| vcvtb.f32.f16 q0, q1 |
| vcvtt.f16.f32 q0, q1 |
| vcvtt.f32.f16 q0, q1 |
| vcvta.s16.f16 q0, q1 |
| vcvta.s32.f32 q0, q1 |
| vcvta.u16.f16 q0, q1 |
| vcvta.u32.f32 q0, q1 |
| vcvtm.s16.f16 q0, q1 |
| vcvtm.s32.f32 q0, q1 |
| vcvtm.u16.f16 q0, q1 |
| vcvtm.u32.f32 q0, q1 |
| vcvtn.s16.f16 q0, q1 |
| vcvtn.s32.f32 q0, q1 |
| vcvtn.u16.f16 q0, q1 |
| vcvtn.u32.f32 q0, q1 |
| vcvtp.s16.f16 q0, q1 |
| vcvtp.s32.f32 q0, q1 |
| vcvtp.u16.f16 q0, q1 |
| vcvtp.u32.f32 q0, q1 |
| vfma.f16 q0, q2, r0 |
| vfma.f32 q0, q2, r0 |
| vfma.f16 q0, q2, q1 |
| vfma.f32 q0, q2, q1 |
| vfms.f16 q0, q2, q1 |
| vfms.f32 q0, q2, q1 |
| vfmas.f16 q0, q2, r0 |
| vfmas.f32 q0, q2, r0 |
| vmaxnm.f16 q0, q2, q1 |
| vmaxnm.f32 q0, q2, q1 |
| vmaxnma.f16 q0, q2 |
| vmaxnma.f32 q0, q2 |
| vmaxnmv.f16 r0, q2 |
| vmaxnmv.f32 r0, q2 |
| vmaxnmav.f16 r0, q2 |
| vmaxnmav.f32 r0, q2 |
| vminnm.f16 q0, q2, q1 |
| vminnm.f32 q0, q2, q1 |
| vminnma.f16 q0, q2 |
| vminnma.f32 q0, q2 |
| vminnmv.f16 r0, q2 |
| vminnmv.f32 r0, q2 |
| vminnmav.f16 r0, q2 |
| vminnmav.f32 r0, q2 |
| vmul.f16 q0, q2, q1 |
| vmul.f32 q0, q2, q1 |
| vmul.f16 q0, q2, r0 |
| vmul.f32 q0, q2, r0 |
| vneg.f16 q0, q2 |
| vneg.f32 q0, q2 |
| vrinta.f16 q0, q2 |
| vrinta.f32 q0, q2 |
| vrintm.f16 q0, q2 |
| vrintm.f32 q0, q2 |
| vrintn.f16 q0, q2 |
| vrintn.f32 q0, q2 |
| vrintp.f16 q0, q2 |
| vrintp.f32 q0, q2 |
| vrintx.f16 q0, q2 |
| vrintx.f32 q0, q2 |
| vrintz.f16 q0, q2 |
| vrintz.f32 q0, q2 |
| vsub.f16 q0, q2, q1 |
| vsub.f32 q0, q2, q1 |
| vsub.f16 q0, q2, r0 |
| vsub.f32 q0, q2, r0 |
| |
| # CHECK: Instruction Info: |
| # CHECK-NEXT: [1]: #uOps |
| # CHECK-NEXT: [2]: Latency |
| # CHECK-NEXT: [3]: RThroughput |
| # CHECK-NEXT: [4]: MayLoad |
| # CHECK-NEXT: [5]: MayStore |
| # CHECK-NEXT: [6]: HasSideEffects (U) |
| |
| # CHECK: [1] [2] [3] [4] [5] [6] Instructions: |
| # CHECK-NEXT: 1 1 2.00 vabd.f16 q0, q2, q1 |
| # CHECK-NEXT: 1 1 2.00 vabd.f32 q0, q2, q1 |
| # CHECK-NEXT: 1 1 2.00 vabs.f16 q0, q2 |
| # CHECK-NEXT: 1 1 2.00 vabs.f32 q0, q2 |
| # CHECK-NEXT: 1 1 2.00 vadd.f16 q0, q2, q1 |
| # CHECK-NEXT: 1 1 2.00 vadd.f32 q0, q2, q1 |
| # CHECK-NEXT: 1 2 2.00 vadd.f16 q0, q2, r0 |
| # CHECK-NEXT: 1 2 2.00 vadd.f32 q0, q2, r0 |
| # CHECK-NEXT: 1 1 2.00 vcadd.f16 q0, q2, q1, #90 |
| # CHECK-NEXT: 1 1 2.00 vcadd.f32 q0, q2, q1, #90 |
| # CHECK-NEXT: 1 2 2.00 vcmla.f16 q0, q2, q1, #90 |
| # CHECK-NEXT: 1 2 2.00 vcmla.f32 q0, q2, q1, #90 |
| # CHECK-NEXT: 1 2 2.00 vcmul.f16 q0, q2, q1, #90 |
| # CHECK-NEXT: 1 2 2.00 vcmul.f32 q0, q2, q1, #90 |
| # CHECK-NEXT: 1 2 2.00 vcvt.f16.s16 q0, q1, #4 |
| # CHECK-NEXT: 1 2 2.00 vcvt.f16.u16 q0, q1, #4 |
| # CHECK-NEXT: 1 2 2.00 vcvt.s16.f16 q0, q1, #4 |
| # CHECK-NEXT: 1 2 2.00 vcvt.u16.f16 q0, q1, #4 |
| # CHECK-NEXT: 1 2 2.00 vcvt.f32.s32 q0, q1, #4 |
| # CHECK-NEXT: 1 2 2.00 vcvt.f32.u32 q0, q1, #4 |
| # CHECK-NEXT: 1 2 2.00 vcvt.s32.f32 q0, q1, #4 |
| # CHECK-NEXT: 1 2 2.00 vcvt.u32.f32 q0, q1, #4 |
| # CHECK-NEXT: 1 2 2.00 vcvt.f16.s16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvt.f32.s32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvt.f16.u16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvt.f32.u32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvt.s16.f16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvt.s32.f32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvt.u16.f16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvt.u32.f32 q0, q1 |
| # CHECK-NEXT: 1 3 2.00 vcvtb.f16.f32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtb.f32.f16 q0, q1 |
| # CHECK-NEXT: 1 3 2.00 vcvtt.f16.f32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtt.f32.f16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvta.s16.f16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvta.s32.f32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvta.u16.f16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvta.u32.f32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtm.s16.f16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtm.s32.f32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtm.u16.f16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtm.u32.f32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtn.s16.f16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtn.s32.f32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtn.u16.f16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtn.u32.f32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtp.s16.f16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtp.s32.f32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtp.u16.f16 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vcvtp.u32.f32 q0, q1 |
| # CHECK-NEXT: 1 2 2.00 vfma.f16 q0, q2, r0 |
| # CHECK-NEXT: 1 2 2.00 vfma.f32 q0, q2, r0 |
| # CHECK-NEXT: 1 2 2.00 vfma.f16 q0, q2, q1 |
| # CHECK-NEXT: 1 2 2.00 vfma.f32 q0, q2, q1 |
| # CHECK-NEXT: 1 2 2.00 vfms.f16 q0, q2, q1 |
| # CHECK-NEXT: 1 2 2.00 vfms.f32 q0, q2, q1 |
| # CHECK-NEXT: 1 2 2.00 vfmas.f16 q0, q2, r0 |
| # CHECK-NEXT: 1 2 2.00 vfmas.f32 q0, q2, r0 |
| # CHECK-NEXT: 1 1 2.00 vmaxnm.f16 q0, q2, q1 |
| # CHECK-NEXT: 1 1 2.00 vmaxnm.f32 q0, q2, q1 |
| # CHECK-NEXT: 1 1 2.00 vmaxnma.f16 q0, q2 |
| # CHECK-NEXT: 1 1 2.00 vmaxnma.f32 q0, q2 |
| # CHECK-NEXT: 1 1 2.00 vmaxnmv.f16 r0, q2 |
| # CHECK-NEXT: 1 1 2.00 vmaxnmv.f32 r0, q2 |
| # CHECK-NEXT: 1 1 2.00 vmaxnmav.f16 r0, q2 |
| # CHECK-NEXT: 1 1 2.00 vmaxnmav.f32 r0, q2 |
| # CHECK-NEXT: 1 1 2.00 vminnm.f16 q0, q2, q1 |
| # CHECK-NEXT: 1 1 2.00 vminnm.f32 q0, q2, q1 |
| # CHECK-NEXT: 1 1 2.00 vminnma.f16 q0, q2 |
| # CHECK-NEXT: 1 1 2.00 vminnma.f32 q0, q2 |
| # CHECK-NEXT: 1 1 2.00 vminnmv.f16 r0, q2 |
| # CHECK-NEXT: 1 1 2.00 vminnmv.f32 r0, q2 |
| # CHECK-NEXT: 1 1 2.00 vminnmav.f16 r0, q2 |
| # CHECK-NEXT: 1 1 2.00 vminnmav.f32 r0, q2 |
| # CHECK-NEXT: 1 2 2.00 vmul.f16 q0, q2, q1 |
| # CHECK-NEXT: 1 2 2.00 vmul.f32 q0, q2, q1 |
| # CHECK-NEXT: 1 2 2.00 vmul.f16 q0, q2, r0 |
| # CHECK-NEXT: 1 2 2.00 vmul.f32 q0, q2, r0 |
| # CHECK-NEXT: 1 1 2.00 vneg.f16 q0, q2 |
| # CHECK-NEXT: 1 1 2.00 vneg.f32 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrinta.f16 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrinta.f32 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrintm.f16 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrintm.f32 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrintn.f16 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrintn.f32 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrintp.f16 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrintp.f32 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrintx.f16 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrintx.f32 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrintz.f16 q0, q2 |
| # CHECK-NEXT: 1 2 2.00 vrintz.f32 q0, q2 |
| # CHECK-NEXT: 1 1 2.00 vsub.f16 q0, q2, q1 |
| # CHECK-NEXT: 1 1 2.00 vsub.f32 q0, q2, q1 |
| # CHECK-NEXT: 1 2 2.00 vsub.f16 q0, q2, r0 |
| # CHECK-NEXT: 1 2 2.00 vsub.f32 q0, q2, r0 |
| |
| # CHECK: Resources: |
| # CHECK-NEXT: [0] - M55UnitALU |
| # CHECK-NEXT: [1] - M55UnitLoadStore |
| # CHECK-NEXT: [2] - M55UnitVecALU |
| # CHECK-NEXT: [3] - M55UnitVecFPALU |
| # CHECK-NEXT: [4] - M55UnitVecSys |
| |
| # CHECK: Resource pressure per iteration: |
| # CHECK-NEXT: [0] [1] [2] [3] [4] |
| # CHECK-NEXT: - - - 192.00 - |
| |
| # CHECK: Resource pressure by instruction: |
| # CHECK-NEXT: [0] [1] [2] [3] [4] Instructions: |
| # CHECK-NEXT: - - - 2.00 - vabd.f16 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vabd.f32 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vabs.f16 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vabs.f32 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vadd.f16 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vadd.f32 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vadd.f16 q0, q2, r0 |
| # CHECK-NEXT: - - - 2.00 - vadd.f32 q0, q2, r0 |
| # CHECK-NEXT: - - - 2.00 - vcadd.f16 q0, q2, q1, #90 |
| # CHECK-NEXT: - - - 2.00 - vcadd.f32 q0, q2, q1, #90 |
| # CHECK-NEXT: - - - 2.00 - vcmla.f16 q0, q2, q1, #90 |
| # CHECK-NEXT: - - - 2.00 - vcmla.f32 q0, q2, q1, #90 |
| # CHECK-NEXT: - - - 2.00 - vcmul.f16 q0, q2, q1, #90 |
| # CHECK-NEXT: - - - 2.00 - vcmul.f32 q0, q2, q1, #90 |
| # CHECK-NEXT: - - - 2.00 - vcvt.f16.s16 q0, q1, #4 |
| # CHECK-NEXT: - - - 2.00 - vcvt.f16.u16 q0, q1, #4 |
| # CHECK-NEXT: - - - 2.00 - vcvt.s16.f16 q0, q1, #4 |
| # CHECK-NEXT: - - - 2.00 - vcvt.u16.f16 q0, q1, #4 |
| # CHECK-NEXT: - - - 2.00 - vcvt.f32.s32 q0, q1, #4 |
| # CHECK-NEXT: - - - 2.00 - vcvt.f32.u32 q0, q1, #4 |
| # CHECK-NEXT: - - - 2.00 - vcvt.s32.f32 q0, q1, #4 |
| # CHECK-NEXT: - - - 2.00 - vcvt.u32.f32 q0, q1, #4 |
| # CHECK-NEXT: - - - 2.00 - vcvt.f16.s16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvt.f32.s32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvt.f16.u16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvt.f32.u32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvt.s16.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvt.s32.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvt.u16.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvt.u32.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtb.f16.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtb.f32.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtt.f16.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtt.f32.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvta.s16.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvta.s32.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvta.u16.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvta.u32.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtm.s16.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtm.s32.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtm.u16.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtm.u32.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtn.s16.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtn.s32.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtn.u16.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtn.u32.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtp.s16.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtp.s32.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtp.u16.f16 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vcvtp.u32.f32 q0, q1 |
| # CHECK-NEXT: - - - 2.00 - vfma.f16 q0, q2, r0 |
| # CHECK-NEXT: - - - 2.00 - vfma.f32 q0, q2, r0 |
| # CHECK-NEXT: - - - 2.00 - vfma.f16 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vfma.f32 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vfms.f16 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vfms.f32 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vfmas.f16 q0, q2, r0 |
| # CHECK-NEXT: - - - 2.00 - vfmas.f32 q0, q2, r0 |
| # CHECK-NEXT: - - - 2.00 - vmaxnm.f16 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vmaxnm.f32 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vmaxnma.f16 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vmaxnma.f32 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vmaxnmv.f16 r0, q2 |
| # CHECK-NEXT: - - - 2.00 - vmaxnmv.f32 r0, q2 |
| # CHECK-NEXT: - - - 2.00 - vmaxnmav.f16 r0, q2 |
| # CHECK-NEXT: - - - 2.00 - vmaxnmav.f32 r0, q2 |
| # CHECK-NEXT: - - - 2.00 - vminnm.f16 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vminnm.f32 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vminnma.f16 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vminnma.f32 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vminnmv.f16 r0, q2 |
| # CHECK-NEXT: - - - 2.00 - vminnmv.f32 r0, q2 |
| # CHECK-NEXT: - - - 2.00 - vminnmav.f16 r0, q2 |
| # CHECK-NEXT: - - - 2.00 - vminnmav.f32 r0, q2 |
| # CHECK-NEXT: - - - 2.00 - vmul.f16 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vmul.f32 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vmul.f16 q0, q2, r0 |
| # CHECK-NEXT: - - - 2.00 - vmul.f32 q0, q2, r0 |
| # CHECK-NEXT: - - - 2.00 - vneg.f16 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vneg.f32 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrinta.f16 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrinta.f32 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrintm.f16 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrintm.f32 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrintn.f16 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrintn.f32 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrintp.f16 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrintp.f32 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrintx.f16 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrintx.f32 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrintz.f16 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vrintz.f32 q0, q2 |
| # CHECK-NEXT: - - - 2.00 - vsub.f16 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vsub.f32 q0, q2, q1 |
| # CHECK-NEXT: - - - 2.00 - vsub.f16 q0, q2, r0 |
| # CHECK-NEXT: - - - 2.00 - vsub.f32 q0, q2, r0 |
