llvm/test/Transforms/InstCombine/trunc-shl-zext.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt < %s -passes=instcombine -S | FileCheck %s

target datalayout = "n8:16:32:64"

define i32 @trunc_shl_zext_32(i32 %a) {
; CHECK-LABEL: define i32 @trunc_shl_zext_32
; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT:    [[SHL:%.*]] = shl i32 [[A]], 4
; CHECK-NEXT:    [[EXT:%.*]] = and i32 [[SHL]], 65520
; CHECK-NEXT:    ret i32 [[EXT]]
;
  %trunc = trunc i32 %a to i16
  %shl = shl i16 %trunc, 4
  %ext = zext i16 %shl to i32
  ret i32 %ext
}

define i64 @trunc_shl_zext_64(i64 %a) {
; CHECK-LABEL: define i64 @trunc_shl_zext_64
; CHECK-SAME: (i64 [[A:%.*]]) {
; CHECK-NEXT:    [[SHL:%.*]] = shl i64 [[A]], 7
; CHECK-NEXT:    [[EXT:%.*]] = and i64 [[SHL]], 128
; CHECK-NEXT:    ret i64 [[EXT]]
;
  %trunc = trunc i64 %a to i8
  %shl = shl i8 %trunc, 7
  %ext = zext i8 %shl to i64
  ret i64 %ext
}