llvm/test/CodeGen/VE/Packed/vec_fneg.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s

define fastcc <512 x float> @test_vec_fneg_v512f32_v(<512 x float> %v) {
; CHECK-LABEL: test_vec_fneg_v512f32_v:
; CHECK:       # %bb.0:
; CHECK-NEXT:    or %s0, 1, (32)1
; CHECK-NEXT:    sll %s0, %s0, 31
; CHECK-NEXT:    lea %s1, 512
; CHECK-NEXT:    lvl %s1
; CHECK-NEXT:    pvxor %v0, %s0, %v0
; CHECK-NEXT:    b.l.t (, %s10)
  %neg = fneg <512 x float> %v
  ret <512 x float> %neg
}