llvm/test/CodeGen/PowerPC/merge_stores_dereferenceable.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s

; This code causes an assertion failure if dereferenceable flag is not properly set when in merging consecutive stores

define <2 x i64> @func(ptr %pdst) {
; CHECK-LABEL: func:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addi 4, 1, -32
; CHECK-NEXT:    lxvd2x 0, 0, 4
; CHECK-NEXT:    xxswapd 34, 0
; CHECK-NEXT:    lxvd2x 0, 0, 4
; CHECK-NEXT:    stxvd2x 0, 0, 3
; CHECK-NEXT:    blr
entry:
  %a = alloca [4 x i64], align 8
  %psrc1 = getelementptr inbounds i64, ptr %a, i64 1
  %d0 = load i64, ptr %a
  %d1 = load i64, ptr %psrc1
  %pdst1 = getelementptr inbounds i64, ptr %pdst, i64 1
  store i64 %d0, ptr %pdst, align 8
  store i64 %d1, ptr %pdst1, align 8
  %vec = load <2 x i64>, ptr %a
  ret <2 x i64> %vec
}