| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=BASE |
| ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=slow-3ops-lea | FileCheck %s --check-prefix=SLOWLEA3 |
| |
| ; TODO: Should the 'cmpl' be 'dec' instead? |
| ; TODO: What if 'cmov' is 1 uop and full throughput (Ryzen)? |
| |
| define i32 @PR28968(i32 %x) { |
| ; BASE-LABEL: PR28968: |
| ; BASE: # %bb.0: |
| ; BASE-NEXT: xorl %eax, %eax |
| ; BASE-NEXT: cmpl $1, %edi |
| ; BASE-NEXT: sete %al |
| ; BASE-NEXT: leal -1(%rax,%rax), %eax |
| ; BASE-NEXT: retq |
| ; |
| ; SLOWLEA3-LABEL: PR28968: |
| ; SLOWLEA3: # %bb.0: |
| ; SLOWLEA3-NEXT: xorl %eax, %eax |
| ; SLOWLEA3-NEXT: cmpl $1, %edi |
| ; SLOWLEA3-NEXT: sete %al |
| ; SLOWLEA3-NEXT: leal -1(,%rax,2), %eax |
| ; SLOWLEA3-NEXT: retq |
| %cmp = icmp eq i32 %x, 1 |
| %sel = select i1 %cmp, i32 1, i32 -1 |
| ret i32 %sel |
| } |
| |
