llvm/test/CodeGen/LoongArch/lasx/intrinsic-max.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s

declare <32 x i8> @llvm.loongarch.lasx.xvmax.b(<32 x i8>, <32 x i8>)

define <32 x i8> @lasx_xvmax_b(<32 x i8> %va, <32 x i8> %vb) nounwind {
; CHECK-LABEL: lasx_xvmax_b:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmax.b $xr0, $xr0, $xr1
; CHECK-NEXT:    ret
entry:
  %res = call <32 x i8> @llvm.loongarch.lasx.xvmax.b(<32 x i8> %va, <32 x i8> %vb)
  ret <32 x i8> %res
}

declare <16 x i16> @llvm.loongarch.lasx.xvmax.h(<16 x i16>, <16 x i16>)

define <16 x i16> @lasx_xvmax_h(<16 x i16> %va, <16 x i16> %vb) nounwind {
; CHECK-LABEL: lasx_xvmax_h:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmax.h $xr0, $xr0, $xr1
; CHECK-NEXT:    ret
entry:
  %res = call <16 x i16> @llvm.loongarch.lasx.xvmax.h(<16 x i16> %va, <16 x i16> %vb)
  ret <16 x i16> %res
}

declare <8 x i32> @llvm.loongarch.lasx.xvmax.w(<8 x i32>, <8 x i32>)

define <8 x i32> @lasx_xvmax_w(<8 x i32> %va, <8 x i32> %vb) nounwind {
; CHECK-LABEL: lasx_xvmax_w:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmax.w $xr0, $xr0, $xr1
; CHECK-NEXT:    ret
entry:
  %res = call <8 x i32> @llvm.loongarch.lasx.xvmax.w(<8 x i32> %va, <8 x i32> %vb)
  ret <8 x i32> %res
}

declare <4 x i64> @llvm.loongarch.lasx.xvmax.d(<4 x i64>, <4 x i64>)

define <4 x i64> @lasx_xvmax_d(<4 x i64> %va, <4 x i64> %vb) nounwind {
; CHECK-LABEL: lasx_xvmax_d:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmax.d $xr0, $xr0, $xr1
; CHECK-NEXT:    ret
entry:
  %res = call <4 x i64> @llvm.loongarch.lasx.xvmax.d(<4 x i64> %va, <4 x i64> %vb)
  ret <4 x i64> %res
}

declare <32 x i8> @llvm.loongarch.lasx.xvmaxi.b(<32 x i8>, i32)

define <32 x i8> @lasx_xvmaxi_b(<32 x i8> %va) nounwind {
; CHECK-LABEL: lasx_xvmaxi_b:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmaxi.b $xr0, $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <32 x i8> @llvm.loongarch.lasx.xvmaxi.b(<32 x i8> %va, i32 1)
  ret <32 x i8> %res
}

declare <16 x i16> @llvm.loongarch.lasx.xvmaxi.h(<16 x i16>, i32)

define <16 x i16> @lasx_xvmaxi_h(<16 x i16> %va) nounwind {
; CHECK-LABEL: lasx_xvmaxi_h:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmaxi.h $xr0, $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <16 x i16> @llvm.loongarch.lasx.xvmaxi.h(<16 x i16> %va, i32 1)
  ret <16 x i16> %res
}

declare <8 x i32> @llvm.loongarch.lasx.xvmaxi.w(<8 x i32>, i32)

define <8 x i32> @lasx_xvmaxi_w(<8 x i32> %va) nounwind {
; CHECK-LABEL: lasx_xvmaxi_w:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmaxi.w $xr0, $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <8 x i32> @llvm.loongarch.lasx.xvmaxi.w(<8 x i32> %va, i32 1)
  ret <8 x i32> %res
}

declare <4 x i64> @llvm.loongarch.lasx.xvmaxi.d(<4 x i64>, i32)

define <4 x i64> @lasx_xvmaxi_d(<4 x i64> %va) nounwind {
; CHECK-LABEL: lasx_xvmaxi_d:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmaxi.d $xr0, $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <4 x i64> @llvm.loongarch.lasx.xvmaxi.d(<4 x i64> %va, i32 1)
  ret <4 x i64> %res
}

declare <32 x i8> @llvm.loongarch.lasx.xvmax.bu(<32 x i8>, <32 x i8>)

define <32 x i8> @lasx_vmax_bu(<32 x i8> %va, <32 x i8> %vb) nounwind {
; CHECK-LABEL: lasx_vmax_bu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmax.bu $xr0, $xr0, $xr1
; CHECK-NEXT:    ret
entry:
  %res = call <32 x i8> @llvm.loongarch.lasx.xvmax.bu(<32 x i8> %va, <32 x i8> %vb)
  ret <32 x i8> %res
}

declare <16 x i16> @llvm.loongarch.lasx.xvmax.hu(<16 x i16>, <16 x i16>)

define <16 x i16> @lasx_xvmax_hu(<16 x i16> %va, <16 x i16> %vb) nounwind {
; CHECK-LABEL: lasx_xvmax_hu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmax.hu $xr0, $xr0, $xr1
; CHECK-NEXT:    ret
entry:
  %res = call <16 x i16> @llvm.loongarch.lasx.xvmax.hu(<16 x i16> %va, <16 x i16> %vb)
  ret <16 x i16> %res
}

declare <8 x i32> @llvm.loongarch.lasx.xvmax.wu(<8 x i32>, <8 x i32>)

define <8 x i32> @lasx_xvmax_wu(<8 x i32> %va, <8 x i32> %vb) nounwind {
; CHECK-LABEL: lasx_xvmax_wu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmax.wu $xr0, $xr0, $xr1
; CHECK-NEXT:    ret
entry:
  %res = call <8 x i32> @llvm.loongarch.lasx.xvmax.wu(<8 x i32> %va, <8 x i32> %vb)
  ret <8 x i32> %res
}

declare <4 x i64> @llvm.loongarch.lasx.xvmax.du(<4 x i64>, <4 x i64>)

define <4 x i64> @lasx_xvmax_du(<4 x i64> %va, <4 x i64> %vb) nounwind {
; CHECK-LABEL: lasx_xvmax_du:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmax.du $xr0, $xr0, $xr1
; CHECK-NEXT:    ret
entry:
  %res = call <4 x i64> @llvm.loongarch.lasx.xvmax.du(<4 x i64> %va, <4 x i64> %vb)
  ret <4 x i64> %res
}

declare <32 x i8> @llvm.loongarch.lasx.xvmaxi.bu(<32 x i8>, i32)

define <32 x i8> @lasx_xvmaxi_bu(<32 x i8> %va) nounwind {
; CHECK-LABEL: lasx_xvmaxi_bu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmaxi.bu $xr0, $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <32 x i8> @llvm.loongarch.lasx.xvmaxi.bu(<32 x i8> %va, i32 1)
  ret <32 x i8> %res
}

declare <16 x i16> @llvm.loongarch.lasx.xvmaxi.hu(<16 x i16>, i32)

define <16 x i16> @lasx_xvmaxi_hu(<16 x i16> %va) nounwind {
; CHECK-LABEL: lasx_xvmaxi_hu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmaxi.hu $xr0, $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <16 x i16> @llvm.loongarch.lasx.xvmaxi.hu(<16 x i16> %va, i32 1)
  ret <16 x i16> %res
}

declare <8 x i32> @llvm.loongarch.lasx.xvmaxi.wu(<8 x i32>, i32)

define <8 x i32> @lasx_xvmaxi_wu(<8 x i32> %va) nounwind {
; CHECK-LABEL: lasx_xvmaxi_wu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmaxi.wu $xr0, $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <8 x i32> @llvm.loongarch.lasx.xvmaxi.wu(<8 x i32> %va, i32 1)
  ret <8 x i32> %res
}

declare <4 x i64> @llvm.loongarch.lasx.xvmaxi.du(<4 x i64>, i32)

define <4 x i64> @lasx_xvmaxi_du(<4 x i64> %va) nounwind {
; CHECK-LABEL: lasx_xvmaxi_du:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvmaxi.du $xr0, $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <4 x i64> @llvm.loongarch.lasx.xvmaxi.du(<4 x i64> %va, i32 1)
  ret <4 x i64> %res
}