llvm/test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir

# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx803 -run-pass=simple-register-coalescing -o - %s | FileCheck -check-prefix=GCN %s

# GCN: {{^body}}

---
name: foo
tracksRegLiveness: true
body: |
  bb.0:
    successors: %bb.2
    %0:sreg_32_xm0 = S_MOV_B32 1
    %1:vgpr_32 = COPY %0
    INLINEASM &"; %1", 1, 327690, def %1, 2147483657, %1(tied-def 3)
    %2:sreg_64 = V_CMP_NE_U32_e64 0, %1, implicit $exec
    undef %3.sub0:sgpr_128 = COPY %0
    %3.sub1:sgpr_128 = COPY %0
    %3.sub2:sgpr_128 = COPY %0
    %4:sgpr_128 = COPY %3
    %5:vgpr_32 = V_MOV_B32_e32 -64, implicit $exec
    %6:vreg_128 = COPY %4
    %7:sreg_32_xm0 = S_AND_B32 target-flags(amdgpu-gotprel) 1, %2.sub0, implicit-def dead $scc
    %8:sreg_32_xm0 = S_MOV_B32 0
    %9:vgpr_32 = COPY %5
    %10:vreg_128 = COPY %6
    S_BRANCH %bb.2

  bb.1:
    %11:vgpr_32 = V_OR_B32_e32 %12.sub0, %12.sub1, implicit $exec
    %13:vgpr_32 = V_OR_B32_e32 %11, %12.sub2, implicit $exec
    %14:vgpr_32 = V_AND_B32_e32 1, %13, implicit $exec
    %15:sreg_64_xexec = V_CMP_EQ_U32_e64 0, %14, implicit $exec
    %16:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %15, implicit $exec
    BUFFER_STORE_DWORD_OFFEN_exact %16, undef %17:vgpr_32, undef %18:sgpr_128, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store 4 into constant-pool, align 1, addrspace 4)
    S_ENDPGM 0

  bb.2:
    successors: %bb.3, %bb.4
    %19:sreg_64 = V_CMP_EQ_U32_e64 1, %7, implicit $exec
    %20:sreg_64 = COPY $exec, implicit-def $exec
    %21:sreg_64 = S_AND_B64 %20, %19, implicit-def dead $scc
    $exec = S_MOV_B64_term %21
    SI_MASK_BRANCH %bb.4, implicit $exec
    S_BRANCH %bb.3

  bb.3:
    successors: %bb.4
    undef %22.sub0:sgpr_128 = COPY %8
    %22.sub1:sgpr_128 = COPY %8
    %22.sub2:sgpr_128 = COPY %8
    %23:sgpr_128 = COPY %22
    %24:vreg_128 = COPY %23
    %10:vreg_128 = COPY %24

  bb.4:
    successors: %bb.5
    $exec = S_OR_B64 $exec, %20, implicit-def $scc

  bb.5:
    successors: %bb.7, %bb.6
    S_CBRANCH_SCC0 %bb.7, implicit undef $scc

  bb.6:
    successors: %bb.9
    %12:vreg_128 = COPY %10
    S_BRANCH %bb.9

  bb.7:
    successors: %bb.8, %bb.10
    %25:vgpr_32 = V_AND_B32_e32 target-flags(amdgpu-gotprel32-hi) 1, %10.sub2, implicit $exec
    %26:sreg_64 = V_CMP_EQ_U32_e64 1, %25, implicit $exec
    %27:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
    %28:vgpr_32 = COPY %27
    %29:sreg_64 = COPY $exec, implicit-def $exec
    %30:sreg_64 = S_AND_B64 %29, %26, implicit-def dead $scc
    $exec = S_MOV_B64_term %30
    SI_MASK_BRANCH %bb.10, implicit $exec
    S_BRANCH %bb.8

  bb.8:
    successors: %bb.10
    %31:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN undef %32:vgpr_32, undef %33:sgpr_128, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from constant-pool, align 1, addrspace 4)
    %34:sreg_64_xexec = V_CMP_NE_U32_e64 0, %31, implicit $exec
    %35:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, -1, %34, implicit $exec
    %28:vgpr_32 = COPY %35
    S_BRANCH %bb.10

  bb.9:
    successors: %bb.11
    S_BRANCH %bb.11

  bb.10:
    successors: %bb.9
    $exec = S_OR_B64 $exec, %29, implicit-def $scc
    %36:vgpr_32 = COPY %28
    %37:sreg_64_xexec = V_CMP_NE_U32_e64 0, %36, implicit $exec
    %38:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %37, implicit $exec
    %39:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
    undef %40.sub0:vreg_128 = COPY %39
    %40.sub1:vreg_128 = COPY %39
    %40.sub2:vreg_128 = COPY %38
    %41:vreg_128 = COPY %40
    %12:vreg_128 = COPY %41
    S_BRANCH %bb.9

  bb.11:
    successors: %bb.2, %bb.1
    %42:vgpr_32 = V_ADD_I32_e32 32, %9, implicit-def dead $vcc, implicit $exec
    V_CMP_EQ_U32_e32 0, %42, implicit-def $vcc, implicit $exec
    %43:vgpr_32 = COPY %42
    $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc
    %44:vreg_128 = COPY %12
    %9:vgpr_32 = COPY %43
    %10:vreg_128 = COPY %44
    S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
    S_BRANCH %bb.2
...