llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-concat-vector.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s

---
name: concat_vectors_v4s16_ss
legalized: true

body: |
  bb.0:
    liveins: $sgpr0, $sgpr1
    ; CHECK-LABEL: name: concat_vectors_v4s16_ss
    ; CHECK: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1
    ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:sgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>)
    %0:_(<2 x s16>) = COPY $sgpr0
    %1:_(<2 x s16>) = COPY $sgpr1
    %2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
...

---
name: concat_vectors_v4s16_sv
legalized: true

body: |
  bb.0:
    liveins: $sgpr0, $vgpr0
    ; CHECK-LABEL: name: concat_vectors_v4s16_sv
    ; CHECK: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY]](<2 x s16>)
    ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY2]](<2 x s16>), [[COPY1]](<2 x s16>)
    %0:_(<2 x s16>) = COPY $sgpr0
    %1:_(<2 x s16>) = COPY $vgpr0
    %2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
...

---
name: concat_vectors_v4s16_vs
legalized: true

body: |
  bb.0:
    liveins: $vgpr0, $sgpr0
    ; CHECK-LABEL: name: concat_vectors_v4s16_vs
    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(<2 x s16>) = COPY [[COPY1]](<2 x s16>)
    ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY2]](<2 x s16>)
    %0:_(<2 x s16>) = COPY $vgpr0
    %1:_(<2 x s16>) = COPY $sgpr0
    %2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
...

---
name: concat_vectors_v4s16_vv
legalized: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; CHECK-LABEL: name: concat_vectors_v4s16_vv
    ; CHECK: [[COPY:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr0
    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr1
    ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:vgpr(<4 x s16>) = G_CONCAT_VECTORS [[COPY]](<2 x s16>), [[COPY1]](<2 x s16>)
    %0:_(<2 x s16>) = COPY $vgpr0
    %1:_(<2 x s16>) = COPY $vgpr1
    %2:_(<4 x s16>) = G_CONCAT_VECTORS %0, %1
...