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rust/llvm-project/refs/heads/rust-revert-fastisel/./llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
blob: cd0995eabd1bbb929bceb87a6bd93b5dfd4b176f [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s -check-prefix=GFX9-GISEL
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck %s -check-prefix=GFX10-GISEL
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck %s -check-prefix=GFX11-GISEL
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck %s -check-prefix=GFX12-GISEL
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s -check-prefix=GFX9-SDAG
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck %s -check-prefix=GFX10-SDAG
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck %s -check-prefix=GFX11-SDAG
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck %s -check-prefix=GFX12-SDAG
define i32 @global_atomic_usub_sat(ptr addrspace(1) %ptr, i32 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v3, v[0:1], off
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX9-GISEL-NEXT: v_sub_u32_e64 v3, v4, v2 clamp
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB0_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v3, v[0:1], off
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: v_sub_u32_e64 v3, v4, v2 clamp
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB0_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%ret = atomicrmw usub_sat ptr addrspace(1) %ptr, i32 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret i32 %ret
}
define i32 @global_atomic_usub_sat_offset(ptr addrspace(1) %ptr, i32 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_offset:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: v_add_co_u32_e32 v3, vcc, 0x1000, v0
; GFX9-GISEL-NEXT: v_addc_co_u32_e32 v4, vcc, 0, v1, vcc
; GFX9-GISEL-NEXT: global_load_dword v0, v[3:4], off
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: .LBB1_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, v0
; GFX9-GISEL-NEXT: v_sub_u32_e64 v0, v1, v2 clamp
; GFX9-GISEL-NEXT: global_atomic_cmpswap v0, v[3:4], v[0:1], off glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB1_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_offset:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v0
; GFX10-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_offset:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v0
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_offset:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off offset:4096 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_offset:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: v_add_co_u32_e32 v3, vcc, 0x1000, v0
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], vcc
; GFX9-SDAG-NEXT: v_addc_co_u32_e64 v4, s[4:5], 0, v1, s[4:5]
; GFX9-SDAG-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX9-SDAG-NEXT: global_load_dword v0, v[0:1], off
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: .LBB1_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX9-SDAG-NEXT: v_sub_u32_e64 v0, v1, v2 clamp
; GFX9-SDAG-NEXT: global_atomic_cmpswap v0, v[3:4], v[0:1], off glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB1_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_offset:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v0
; GFX10-SDAG-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_offset:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_offset:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off offset:4096 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%gep = getelementptr i32, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i32 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret i32 %ret
}
define void @global_atomic_usub_sat_nortn(ptr addrspace(1) %ptr, i32 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_nortn:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v4, v[0:1], off
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: .LBB2_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_sub_u32_e64 v3, v4, v2 clamp
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB2_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_nortn:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_nortn:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_nortn:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_nortn:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v4, v[0:1], off
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: .LBB2_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_sub_u32_e64 v3, v4, v2 clamp
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB2_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_nortn:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_nortn:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_nortn:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%ret = atomicrmw usub_sat ptr addrspace(1) %ptr, i32 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret void
}
define void @global_atomic_usub_sat_offset_nortn(ptr addrspace(1) %ptr, i32 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_offset_nortn:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: v_add_co_u32_e32 v0, vcc, 0x1000, v0
; GFX9-GISEL-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-GISEL-NEXT: global_load_dword v4, v[0:1], off
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: .LBB3_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_sub_u32_e64 v3, v4, v2 clamp
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB3_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_offset_nortn:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v0
; GFX10-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_offset_nortn:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v0
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_offset_nortn:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off offset:4096 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_offset_nortn:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: v_add_co_u32_e32 v3, vcc, 0x1000, v0
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], vcc
; GFX9-SDAG-NEXT: v_addc_co_u32_e64 v4, s[4:5], 0, v1, s[4:5]
; GFX9-SDAG-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX9-SDAG-NEXT: global_load_dword v1, v[0:1], off
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: .LBB3_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_sub_u32_e64 v0, v1, v2 clamp
; GFX9-SDAG-NEXT: global_atomic_cmpswap v0, v[3:4], v[0:1], off glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB3_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_offset_nortn:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v0
; GFX10-SDAG-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_offset_nortn:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_offset_nortn:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off offset:4096 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%gep = getelementptr i32, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i32 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret void
}
define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset(ptr addrspace(1) %ptr, i32 %data, ptr addrspace(1) %dst) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX9-GISEL-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX9-GISEL-NEXT: s_mov_b64 s[2:3], 0
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 0x1000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: s_load_dword s5, s[0:1], 0x1000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, s5
; GFX9-GISEL-NEXT: .LBB4_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, v1
; GFX9-GISEL-NEXT: v_sub_u32_e64 v1, v2, s4 clamp
; GFX9-GISEL-NEXT: global_atomic_cmpswap v1, v0, v[1:2], s[0:1] glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2
; GFX9-GISEL-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB4_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x10
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: global_store_dword v0, v1, s[0:1]
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x2
; GFX10-GISEL-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-GISEL-NEXT: s_load_dwordx2 s[2:3], s[8:9], 0x10
; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x1000
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s4
; GFX10-GISEL-NEXT: global_atomic_csub v0, v1, v0, s[0:1] glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0
; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[2:3]
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x2
; GFX11-GISEL-NEXT: s_load_b32 s6, s[4:5], 0x8
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-GISEL-NEXT: s_load_b64 s[2:3], s[4:5], 0x10
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0x1000 :: v_dual_mov_b32 v0, s6
; GFX11-GISEL-NEXT: global_atomic_csub_u32 v0, v1, v0, s[0:1] glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, 0
; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[2:3]
; GFX11-GISEL-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_clause 0x1
; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x10
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX12-GISEL-NEXT: global_atomic_sub_clamp_u32 v0, v1, v0, s[0:1] offset:4096 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[4:5]
; GFX12-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[2:3], s[8:9], 0x0
; GFX9-SDAG-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX9-SDAG-NEXT: s_mov_b64 s[0:1], 0
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: s_load_dword s5, s[2:3], 0x1000
; GFX9-SDAG-NEXT: s_add_u32 s2, s2, 0x1000
; GFX9-SDAG-NEXT: s_addc_u32 s3, s3, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s5
; GFX9-SDAG-NEXT: .LBB4_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, v0
; GFX9-SDAG-NEXT: v_sub_u32_e64 v2, v3, s4 clamp
; GFX9-SDAG-NEXT: global_atomic_cmpswap v0, v1, v[2:3], s[2:3] glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v0, v3
; GFX9-SDAG-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB4_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[0:1]
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x10
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: global_store_dword v1, v0, s[0:1]
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x2
; GFX10-SDAG-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-SDAG-NEXT: s_load_dwordx2 s[2:3], s[8:9], 0x10
; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0x1000
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s4
; GFX10-SDAG-NEXT: global_atomic_csub v0, v0, v1, s[0:1] glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, 0
; GFX10-SDAG-NEXT: global_store_dword v1, v0, s[2:3]
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x2
; GFX11-SDAG-NEXT: s_load_b32 s6, s[4:5], 0x8
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-SDAG-NEXT: s_load_b64 s[2:3], s[4:5], 0x10
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_dual_mov_b32 v0, 0x1000 :: v_dual_mov_b32 v1, s6
; GFX11-SDAG-NEXT: global_atomic_csub_u32 v0, v0, v1, s[0:1] glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, 0
; GFX11-SDAG-NEXT: global_store_b32 v1, v0, s[2:3]
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x10
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s2
; GFX12-SDAG-NEXT: global_atomic_sub_clamp_u32 v1, v0, v1, s[0:1] offset:4096 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[4:5]
; GFX12-SDAG-NEXT: s_endpgm
%gep = getelementptr i32, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i32 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
store i32 %ret, ptr addrspace(1) %dst
ret void
}
define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn(ptr addrspace(1) %ptr, i32 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX9-GISEL-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX9-GISEL-NEXT: s_mov_b64 s[2:3], 0
; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x1000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: s_load_dword s5, s[0:1], 0x1000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, s5
; GFX9-GISEL-NEXT: .LBB5_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: v_sub_u32_e64 v0, v1, s4 clamp
; GFX9-GISEL-NEXT: global_atomic_cmpswap v0, v2, v[0:1], s[0:1] glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GFX9-GISEL-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, v0
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB5_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x1
; GFX10-GISEL-NEXT: s_load_dword s2, s[8:9], 0x8
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0x1000
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-GISEL-NEXT: global_atomic_csub v0, v1, v0, s[0:1] glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: s_load_b32 s2, s[4:5], 0x8
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0x1000 :: v_dual_mov_b32 v0, s2
; GFX11-GISEL-NEXT: global_atomic_csub_u32 v0, v1, v0, s[0:1] glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
; GFX12-GISEL-NEXT: global_atomic_sub_clamp_u32 v0, v1, v0, s[0:1] offset:4096 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[2:3], s[8:9], 0x0
; GFX9-SDAG-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX9-SDAG-NEXT: s_mov_b64 s[0:1], 0
; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: s_load_dword s5, s[2:3], 0x1000
; GFX9-SDAG-NEXT: s_add_u32 s2, s2, 0x1000
; GFX9-SDAG-NEXT: s_addc_u32 s3, s3, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, s5
; GFX9-SDAG-NEXT: .LBB5_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: v_sub_u32_e64 v0, v1, s4 clamp
; GFX9-SDAG-NEXT: global_atomic_cmpswap v0, v2, v[0:1], s[2:3] glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GFX9-SDAG-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB5_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x1
; GFX10-SDAG-NEXT: s_load_dword s2, s[8:9], 0x8
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0x1000
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s2
; GFX10-SDAG-NEXT: global_atomic_csub v0, v0, v1, s[0:1] glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x8
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_dual_mov_b32 v0, 0x1000 :: v_dual_mov_b32 v1, s2
; GFX11-SDAG-NEXT: global_atomic_csub_u32 v0, v0, v1, s[0:1] glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
; GFX12-SDAG-NEXT: global_atomic_sub_clamp_u32 v0, v0, v1, s[0:1] offset:4096 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_endpgm
%gep = getelementptr i32, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i32 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret void
}
define i16 @global_atomic_usub_sat_16(ptr addrspace(1) %ptr, i16 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_16:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v3, v[0:1], off
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0xffff0000
; GFX9-GISEL-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v6, v3
; GFX9-GISEL-NEXT: v_sub_u16_e64 v3, v6, v2 clamp
; GFX9-GISEL-NEXT: v_and_or_b32 v5, v6, v4, v3
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[5:6], off glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v6
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB6_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_16:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: global_load_dword v3, v[0:1], off
; GFX10-GISEL-NEXT: s_mov_b32 s4, 0
; GFX10-GISEL-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX10-GISEL-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX10-GISEL-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX10-GISEL-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX10-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB6_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_16:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: global_load_b32 v3, v[0:1], off
; GFX11-GISEL-NEXT: s_mov_b32 s0, 0
; GFX11-GISEL-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX11-GISEL-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_sub_nc_u16 v3.l, v4.l, v2.l clamp
; GFX11-GISEL-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB6_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_16:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_load_b32 v3, v[0:1], off
; GFX12-GISEL-NEXT: s_mov_b32 s0, 0
; GFX12-GISEL-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX12-GISEL-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB6_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_16:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v3, v[0:1], off
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: s_mov_b32 s6, 0xffff0000
; GFX9-SDAG-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: v_sub_u16_e64 v3, v4, v2 clamp
; GFX9-SDAG-NEXT: v_and_or_b32 v3, v4, s6, v3
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB6_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_16:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: global_load_dword v3, v[0:1], off
; GFX10-SDAG-NEXT: s_mov_b32 s4, 0
; GFX10-SDAG-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX10-SDAG-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX10-SDAG-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX10-SDAG-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB6_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_16:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: global_load_b32 v3, v[0:1], off
; GFX11-SDAG-NEXT: s_mov_b32 s0, 0
; GFX11-SDAG-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX11-SDAG-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_sub_nc_u16 v3.l, v4.l, v2.l clamp
; GFX11-SDAG-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB6_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: v_mov_b16_e32 v0.l, v3.l
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_16:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: global_load_b32 v3, v[0:1], off
; GFX12-SDAG-NEXT: s_mov_b32 s0, 0
; GFX12-SDAG-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX12-SDAG-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB6_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%ret = atomicrmw usub_sat ptr addrspace(1) %ptr, i16 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret i16 %ret
}
define i16 @global_atomic_usub_sat_offset_16(ptr addrspace(1) %ptr, i16 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_offset_16:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v3, v[0:1], off offset:2048
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0xffff0000
; GFX9-GISEL-NEXT: .LBB7_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v6, v3
; GFX9-GISEL-NEXT: v_sub_u16_e64 v3, v6, v2 clamp
; GFX9-GISEL-NEXT: v_and_or_b32 v5, v6, v4, v3
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[5:6], off offset:2048 glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v6
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB7_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_offset_16:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_add_co_u32 v3, vcc_lo, 0x800, v0
; GFX10-GISEL-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
; GFX10-GISEL-NEXT: s_mov_b32 s4, 0
; GFX10-GISEL-NEXT: global_load_dword v0, v[3:4], off
; GFX10-GISEL-NEXT: .LBB7_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, v0
; GFX10-GISEL-NEXT: v_sub_nc_u16 v0, v1, v2 clamp
; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX10-GISEL-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_cmpswap v0, v[3:4], v[0:1], off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX10-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB7_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_offset_16:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: global_load_b32 v3, v[0:1], off offset:2048
; GFX11-GISEL-NEXT: s_mov_b32 s0, 0
; GFX11-GISEL-NEXT: .LBB7_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX11-GISEL-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_sub_nc_u16 v3.l, v4.l, v2.l clamp
; GFX11-GISEL-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2048 glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB7_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_offset_16:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_load_b32 v3, v[0:1], off offset:2048
; GFX12-GISEL-NEXT: s_mov_b32 s0, 0
; GFX12-GISEL-NEXT: .LBB7_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX12-GISEL-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB7_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_offset_16:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v3, v[0:1], off offset:2048
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: s_mov_b32 s6, 0xffff0000
; GFX9-SDAG-NEXT: .LBB7_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: v_sub_u16_e64 v3, v4, v2 clamp
; GFX9-SDAG-NEXT: v_and_or_b32 v3, v4, s6, v3
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off offset:2048 glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB7_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_offset_16:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_add_co_u32 v3, vcc_lo, 0x800, v0
; GFX10-SDAG-NEXT: v_add_co_ci_u32_e64 v4, null, 0, v1, vcc_lo
; GFX10-SDAG-NEXT: s_mov_b32 s4, 0
; GFX10-SDAG-NEXT: global_load_dword v0, v[3:4], off
; GFX10-SDAG-NEXT: .LBB7_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX10-SDAG-NEXT: v_sub_nc_u16 v0, v1, v2 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX10-SDAG-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_cmpswap v0, v[3:4], v[0:1], off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX10-SDAG-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB7_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_offset_16:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: global_load_b32 v3, v[0:1], off offset:2048
; GFX11-SDAG-NEXT: s_mov_b32 s0, 0
; GFX11-SDAG-NEXT: .LBB7_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX11-SDAG-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_sub_nc_u16 v3.l, v4.l, v2.l clamp
; GFX11-SDAG-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2048 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB7_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: v_mov_b16_e32 v0.l, v3.l
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_offset_16:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: global_load_b32 v3, v[0:1], off offset:2048
; GFX12-SDAG-NEXT: s_mov_b32 s0, 0
; GFX12-SDAG-NEXT: .LBB7_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX12-SDAG-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB7_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%gep = getelementptr i16, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i16 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret i16 %ret
}
define void @global_atomic_usub_sat_nortn_16(ptr addrspace(1) %ptr, i16 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_nortn_16:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v4, v[0:1], off
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xffff0000
; GFX9-GISEL-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_sub_u16_e64 v3, v4, v2 clamp
; GFX9-GISEL-NEXT: v_and_or_b32 v3, v4, v5, v3
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB8_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_nortn_16:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: global_load_dword v4, v[0:1], off
; GFX10-GISEL-NEXT: s_mov_b32 s4, 0
; GFX10-GISEL-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX10-GISEL-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX10-GISEL-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX10-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB8_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_nortn_16:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: global_load_b32 v4, v[0:1], off
; GFX11-GISEL-NEXT: s_mov_b32 s0, 0
; GFX11-GISEL-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: v_sub_nc_u16 v3.l, v4.l, v2.l clamp
; GFX11-GISEL-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX11-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB8_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_nortn_16:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_load_b32 v4, v[0:1], off
; GFX12-GISEL-NEXT: s_mov_b32 s0, 0
; GFX12-GISEL-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-GISEL-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB8_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_nortn_16:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v4, v[0:1], off
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: s_mov_b32 s6, 0xffff0000
; GFX9-SDAG-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_sub_u16_e64 v3, v4, v2 clamp
; GFX9-SDAG-NEXT: v_and_or_b32 v3, v4, s6, v3
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB8_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_nortn_16:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: global_load_dword v4, v[0:1], off
; GFX10-SDAG-NEXT: s_mov_b32 s4, 0
; GFX10-SDAG-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX10-SDAG-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX10-SDAG-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB8_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_nortn_16:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: global_load_b32 v4, v[0:1], off
; GFX11-SDAG-NEXT: s_mov_b32 s0, 0
; GFX11-SDAG-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: v_sub_nc_u16 v3.l, v4.l, v2.l clamp
; GFX11-SDAG-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX11-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB8_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_nortn_16:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: global_load_b32 v4, v[0:1], off
; GFX12-SDAG-NEXT: s_mov_b32 s0, 0
; GFX12-SDAG-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-SDAG-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB8_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%ret = atomicrmw usub_sat ptr addrspace(1) %ptr, i16 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret void
}
define void @global_atomic_usub_sat_offset_nortn_16(ptr addrspace(1) %ptr, i16 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_offset_nortn_16:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v4, v[0:1], off offset:2048
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xffff0000
; GFX9-GISEL-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_sub_u16_e64 v3, v4, v2 clamp
; GFX9-GISEL-NEXT: v_and_or_b32 v3, v4, v5, v3
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off offset:2048 glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB9_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_offset_nortn_16:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_add_co_u32 v0, vcc_lo, 0x800, v0
; GFX10-GISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX10-GISEL-NEXT: s_mov_b32 s4, 0
; GFX10-GISEL-NEXT: global_load_dword v4, v[0:1], off
; GFX10-GISEL-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX10-GISEL-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX10-GISEL-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX10-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB9_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_offset_nortn_16:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: global_load_b32 v4, v[0:1], off offset:2048
; GFX11-GISEL-NEXT: s_mov_b32 s0, 0
; GFX11-GISEL-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: v_sub_nc_u16 v3.l, v4.l, v2.l clamp
; GFX11-GISEL-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2048 glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX11-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB9_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_offset_nortn_16:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_load_b32 v4, v[0:1], off offset:2048
; GFX12-GISEL-NEXT: s_mov_b32 s0, 0
; GFX12-GISEL-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-GISEL-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB9_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_offset_nortn_16:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v4, v[0:1], off offset:2048
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: s_mov_b32 s6, 0xffff0000
; GFX9-SDAG-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_sub_u16_e64 v3, v4, v2 clamp
; GFX9-SDAG-NEXT: v_and_or_b32 v3, v4, s6, v3
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off offset:2048 glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB9_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_offset_nortn_16:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, 0x800, v0
; GFX10-SDAG-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX10-SDAG-NEXT: s_mov_b32 s4, 0
; GFX10-SDAG-NEXT: global_load_dword v4, v[0:1], off
; GFX10-SDAG-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX10-SDAG-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX10-SDAG-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB9_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_offset_nortn_16:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: global_load_b32 v4, v[0:1], off offset:2048
; GFX11-SDAG-NEXT: s_mov_b32 s0, 0
; GFX11-SDAG-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: v_sub_nc_u16 v3.l, v4.l, v2.l clamp
; GFX11-SDAG-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2048 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX11-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB9_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_offset_nortn_16:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: global_load_b32 v4, v[0:1], off offset:2048
; GFX12-SDAG-NEXT: s_mov_b32 s0, 0
; GFX12-SDAG-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: v_sub_nc_u16 v3, v4, v2 clamp
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-SDAG-NEXT: v_and_or_b32 v3, 0xffff0000, v4, v3
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB9_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%gep = getelementptr i16, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i16 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret void
}
define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_16(ptr addrspace(1) %ptr, i16 %data, ptr addrspace(1) %dst) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_16:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX9-GISEL-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX9-GISEL-NEXT: s_mov_b64 s[2:3], 0
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 0xffff0000
; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: s_load_dword s5, s[0:1], 0x800
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, s5
; GFX9-GISEL-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, v2
; GFX9-GISEL-NEXT: v_sub_u16_e64 v2, v3, s4 clamp
; GFX9-GISEL-NEXT: v_and_or_b32 v2, v3, v0, v2
; GFX9-GISEL-NEXT: global_atomic_cmpswap v2, v1, v[2:3], s[0:1] offset:2048 glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3
; GFX9-GISEL-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB10_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x10
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: global_store_short v0, v2, s[0:1]
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_16:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x1
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-GISEL-NEXT: s_load_dword s2, s[8:9], 0x8
; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0x800
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: s_load_dword s3, s[0:1], 0x800
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0
; GFX10-GISEL-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, v1
; GFX10-GISEL-NEXT: v_sub_nc_u16 v1, v2, s2 clamp
; GFX10-GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX10-GISEL-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
; GFX10-GISEL-NEXT: global_atomic_cmpswap v1, v0, v[1:2], s[0:1] glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
; GFX10-GISEL-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s3
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB10_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s3
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x10
; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: global_store_short v0, v1, s[0:1]
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_16:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-GISEL-NEXT: s_load_b32 s2, s[4:5], 0x8
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: s_load_b32 s3, s[0:1], 0x800
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s3
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0
; GFX11-GISEL-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, v1
; GFX11-GISEL-NEXT: v_mov_b16_e32 v1.h, 0
; GFX11-GISEL-NEXT: v_sub_nc_u16 v1.l, v2.l, s2 clamp
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:2048 glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
; GFX11-GISEL-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB10_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s3
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: global_store_b16 v0, v1, s[0:1]
; GFX11-GISEL-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_16:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_load_b32 s3, s[0:1], 0x800
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s3
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0
; GFX12-GISEL-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, v1
; GFX12-GISEL-NEXT: v_sub_nc_u16 v1, v2, s2 clamp
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX12-GISEL-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB10_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s3
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b16 v0, v1, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_16:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX9-SDAG-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX9-SDAG-NEXT: s_mov_b64 s[2:3], 0
; GFX9-SDAG-NEXT: s_mov_b32 s5, 0xffff0000
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: s_load_dword s6, s[0:1], 0x800
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s6
; GFX9-SDAG-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, v0
; GFX9-SDAG-NEXT: v_sub_u16_e64 v0, v3, s4 clamp
; GFX9-SDAG-NEXT: v_and_or_b32 v2, v3, s5, v0
; GFX9-SDAG-NEXT: global_atomic_cmpswap v0, v1, v[2:3], s[0:1] offset:2048 glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v0, v3
; GFX9-SDAG-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB10_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x10
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: global_store_short v1, v0, s[0:1]
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_16:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x1
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-SDAG-NEXT: s_load_dword s2, s[8:9], 0x8
; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: s_load_dword s3, s[0:1], 0x800
; GFX10-SDAG-NEXT: s_add_u32 s0, s0, 0x800
; GFX10-SDAG-NEXT: s_addc_u32 s1, s1, 0
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0
; GFX10-SDAG-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, v1
; GFX10-SDAG-NEXT: v_sub_nc_u16 v1, v2, s2 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX10-SDAG-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
; GFX10-SDAG-NEXT: global_atomic_cmpswap v1, v0, v[1:2], s[0:1] glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
; GFX10-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s3
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB10_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s3
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x10
; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: global_store_short v0, v1, s[0:1]
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_16:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x8
; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x800
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s3
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0
; GFX11-SDAG-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, v1
; GFX11-SDAG-NEXT: v_mov_b16_e32 v1.h, 0
; GFX11-SDAG-NEXT: v_sub_nc_u16 v1.l, v2.l, s2 clamp
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:2048 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
; GFX11-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB10_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s3
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: global_store_b16 v0, v1, s[0:1]
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_16:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x800
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0
; GFX12-SDAG-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, v1
; GFX12-SDAG-NEXT: v_sub_nc_u16 v1, v2, s2 clamp
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX12-SDAG-NEXT: v_and_or_b32 v1, 0xffff0000, v2, v1
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB10_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s3
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: global_store_b16 v0, v1, s[0:1]
; GFX12-SDAG-NEXT: s_endpgm
%gep = getelementptr i16, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i16 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
store i16 %ret, ptr addrspace(1) %dst
ret void
}
define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_16(ptr addrspace(1) %ptr, i16 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_16:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX9-GISEL-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX9-GISEL-NEXT: s_mov_b64 s[2:3], 0
; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xffff0000
; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: s_load_dword s5, s[0:1], 0x800
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, s5
; GFX9-GISEL-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: v_sub_u16_e64 v0, v1, s4 clamp
; GFX9-GISEL-NEXT: v_and_or_b32 v0, v1, v2, v0
; GFX9-GISEL-NEXT: global_atomic_cmpswap v0, v3, v[0:1], s[0:1] offset:2048 glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GFX9-GISEL-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, v0
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB11_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_16:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x1
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-GISEL-NEXT: s_load_dword s2, s[8:9], 0x8
; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0x800
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: s_load_dword s3, s[0:1], 0x800
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s3
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0
; GFX10-GISEL-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: v_sub_nc_u16 v0, v1, s2 clamp
; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX10-GISEL-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
; GFX10-GISEL-NEXT: global_atomic_cmpswap v0, v2, v[0:1], s[0:1] glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, v0
; GFX10-GISEL-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s3
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB11_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_16:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-GISEL-NEXT: s_load_b32 s2, s[4:5], 0x8
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: s_load_b32 s3, s[0:1], 0x800
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0
; GFX11-GISEL-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_sub_nc_u16 v0.l, v1.l, s2 clamp
; GFX11-GISEL-NEXT: v_mov_b16_e32 v0.h, 0
; GFX11-GISEL-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:2048 glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, v0
; GFX11-GISEL-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB11_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_16:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_load_b32 s3, s[0:1], 0x800
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0
; GFX12-GISEL-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_sub_nc_u16 v0, v1, s2 clamp
; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, v0
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB11_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_16:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX9-SDAG-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX9-SDAG-NEXT: s_mov_b64 s[2:3], 0
; GFX9-SDAG-NEXT: s_mov_b32 s5, 0xffff0000
; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: s_load_dword s6, s[0:1], 0x800
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, s6
; GFX9-SDAG-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: v_sub_u16_e64 v0, v1, s4 clamp
; GFX9-SDAG-NEXT: v_and_or_b32 v0, v1, s5, v0
; GFX9-SDAG-NEXT: global_atomic_cmpswap v0, v2, v[0:1], s[0:1] offset:2048 glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GFX9-SDAG-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB11_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_16:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x1
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-SDAG-NEXT: s_load_dword s2, s[8:9], 0x8
; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: s_load_dword s3, s[0:1], 0x800
; GFX10-SDAG-NEXT: s_add_u32 s0, s0, 0x800
; GFX10-SDAG-NEXT: s_addc_u32 s1, s1, 0
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s3
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0
; GFX10-SDAG-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: v_sub_nc_u16 v0, v1, s2 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX10-SDAG-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
; GFX10-SDAG-NEXT: global_atomic_cmpswap v0, v2, v[0:1], s[0:1] glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX10-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s3
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB11_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_16:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-SDAG-NEXT: s_load_b32 s2, s[4:5], 0x8
; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x800
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s3
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0
; GFX11-SDAG-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_sub_nc_u16 v0.l, v1.l, s2 clamp
; GFX11-SDAG-NEXT: v_mov_b16_e32 v0.h, 0
; GFX11-SDAG-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:2048 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX11-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB11_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_16:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x800
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0
; GFX12-SDAG-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_sub_nc_u16 v0, v1, s2 clamp
; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_or_b32 v0, 0xffff0000, v1, v0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:2048 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB11_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_endpgm
%gep = getelementptr i16, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i16 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret void
}
define i8 @global_atomic_usub_sat_8(ptr addrspace(1) %ptr, i8 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_8:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v3, v[0:1], off
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: v_lshlrev_b16_e32 v2, 8, v2
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0xff
; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xffffff00
; GFX9-GISEL-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v7, v3
; GFX9-GISEL-NEXT: v_lshlrev_b16_e32 v3, 8, v7
; GFX9-GISEL-NEXT: v_sub_u16_e64 v3, v3, v2 clamp
; GFX9-GISEL-NEXT: v_and_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX9-GISEL-NEXT: v_and_or_b32 v6, v7, v5, v3
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[6:7], off glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v7
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB12_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_8:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: global_load_dword v3, v[0:1], off
; GFX10-GISEL-NEXT: v_lshlrev_b16 v2, 8, v2
; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, 0xff
; GFX10-GISEL-NEXT: s_mov_b32 s4, 0
; GFX10-GISEL-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: v_mov_b32_e32 v6, v3
; GFX10-GISEL-NEXT: v_lshlrev_b16 v3, 8, v6
; GFX10-GISEL-NEXT: v_sub_nc_u16 v3, v3, v2 clamp
; GFX10-GISEL-NEXT: v_and_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX10-GISEL-NEXT: v_and_or_b32 v5, 0xffffff00, v6, v3
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[5:6], off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v6
; GFX10-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB12_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_8:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: global_load_b32 v3, v[0:1], off
; GFX11-GISEL-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
; GFX11-GISEL-NEXT: s_mov_b32 s0, 0
; GFX11-GISEL-NEXT: .p2align 6
; GFX11-GISEL-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_lshlrev_b16 v2.h, 8, v4.l
; GFX11-GISEL-NEXT: v_sub_nc_u16 v2.h, v2.h, v2.l clamp
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_lshrrev_b16 v3.l, 8, v2.h
; GFX11-GISEL-NEXT: v_and_b32_e32 v3, 0xff, v3
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB12_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_8:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_load_b32 v3, v[0:1], off
; GFX12-GISEL-NEXT: v_lshlrev_b16 v2, 8, v2
; GFX12-GISEL-NEXT: s_mov_b32 s0, 0
; GFX12-GISEL-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_lshlrev_b16 v3, 8, v4
; GFX12-GISEL-NEXT: v_sub_nc_u16 v3, v3, v2 clamp
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_lshrrev_b16 v3, 8, v3
; GFX12-GISEL-NEXT: v_and_b32_e32 v3, 0xff, v3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB12_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_8:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v3, v[0:1], off
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: s_movk_i32 s6, 0xff00
; GFX9-SDAG-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: v_sub_u16_sdwa v3, v4, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
; GFX9-SDAG-NEXT: v_and_or_b32 v3, v4, s6, v3
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB12_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_8:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: global_load_dword v3, v[0:1], off
; GFX10-SDAG-NEXT: v_and_b32_e32 v2, 0xff, v2
; GFX10-SDAG-NEXT: s_mov_b32 s4, 0
; GFX10-SDAG-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX10-SDAG-NEXT: v_and_b32_e32 v3, 0xff, v4
; GFX10-SDAG-NEXT: v_sub_nc_u16 v3, v3, v2 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX10-SDAG-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX10-SDAG-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB12_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_8:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: global_load_b32 v3, v[0:1], off
; GFX11-SDAG-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-SDAG-NEXT: s_mov_b32 s0, 0
; GFX11-SDAG-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX11-SDAG-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_b16 v2.h, 0xff, v4.l
; GFX11-SDAG-NEXT: v_sub_nc_u16 v3.l, v2.h, v2.l clamp
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB12_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: v_mov_b16_e32 v0.l, v3.l
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_8:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: global_load_b32 v3, v[0:1], off
; GFX12-SDAG-NEXT: v_and_b32_e32 v2, 0xff, v2
; GFX12-SDAG-NEXT: s_mov_b32 s0, 0
; GFX12-SDAG-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_b32_e32 v3, 0xff, v4
; GFX12-SDAG-NEXT: v_sub_nc_u16 v3, v3, v2 clamp
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-SDAG-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB12_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%ret = atomicrmw usub_sat ptr addrspace(1) %ptr, i8 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret i8 %ret
}
define i8 @global_atomic_usub_sat_offset_8(ptr addrspace(1) %ptr, i8 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_offset_8:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v3, v[0:1], off offset:1024
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: v_lshlrev_b16_e32 v2, 8, v2
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0xff
; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xffffff00
; GFX9-GISEL-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v7, v3
; GFX9-GISEL-NEXT: v_lshlrev_b16_e32 v3, 8, v7
; GFX9-GISEL-NEXT: v_sub_u16_e64 v3, v3, v2 clamp
; GFX9-GISEL-NEXT: v_and_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX9-GISEL-NEXT: v_and_or_b32 v6, v7, v5, v3
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[6:7], off offset:1024 glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v7
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB13_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_offset_8:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: global_load_dword v3, v[0:1], off offset:1024
; GFX10-GISEL-NEXT: v_lshlrev_b16 v2, 8, v2
; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, 0xff
; GFX10-GISEL-NEXT: s_mov_b32 s4, 0
; GFX10-GISEL-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: v_mov_b32_e32 v6, v3
; GFX10-GISEL-NEXT: v_lshlrev_b16 v3, 8, v6
; GFX10-GISEL-NEXT: v_sub_nc_u16 v3, v3, v2 clamp
; GFX10-GISEL-NEXT: v_and_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX10-GISEL-NEXT: v_and_or_b32 v5, 0xffffff00, v6, v3
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[5:6], off offset:1024 glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v6
; GFX10-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB13_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_offset_8:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: global_load_b32 v3, v[0:1], off offset:1024
; GFX11-GISEL-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
; GFX11-GISEL-NEXT: s_mov_b32 s0, 0
; GFX11-GISEL-NEXT: .p2align 6
; GFX11-GISEL-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_lshlrev_b16 v2.h, 8, v4.l
; GFX11-GISEL-NEXT: v_sub_nc_u16 v2.h, v2.h, v2.l clamp
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_lshrrev_b16 v3.l, 8, v2.h
; GFX11-GISEL-NEXT: v_and_b32_e32 v3, 0xff, v3
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:1024 glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB13_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_offset_8:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_load_b32 v3, v[0:1], off offset:1024
; GFX12-GISEL-NEXT: v_lshlrev_b16 v2, 8, v2
; GFX12-GISEL-NEXT: s_mov_b32 s0, 0
; GFX12-GISEL-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_lshlrev_b16 v3, 8, v4
; GFX12-GISEL-NEXT: v_sub_nc_u16 v3, v3, v2 clamp
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_lshrrev_b16 v3, 8, v3
; GFX12-GISEL-NEXT: v_and_b32_e32 v3, 0xff, v3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB13_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_offset_8:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v3, v[0:1], off offset:1024
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: s_movk_i32 s6, 0xff00
; GFX9-SDAG-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: v_sub_u16_sdwa v3, v4, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
; GFX9-SDAG-NEXT: v_and_or_b32 v3, v4, s6, v3
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off offset:1024 glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB13_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_offset_8:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: global_load_dword v3, v[0:1], off offset:1024
; GFX10-SDAG-NEXT: v_and_b32_e32 v2, 0xff, v2
; GFX10-SDAG-NEXT: s_mov_b32 s4, 0
; GFX10-SDAG-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX10-SDAG-NEXT: v_and_b32_e32 v3, 0xff, v4
; GFX10-SDAG-NEXT: v_sub_nc_u16 v3, v3, v2 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX10-SDAG-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off offset:1024 glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX10-SDAG-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB13_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_offset_8:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: global_load_b32 v3, v[0:1], off offset:1024
; GFX11-SDAG-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-SDAG-NEXT: s_mov_b32 s0, 0
; GFX11-SDAG-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX11-SDAG-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_b16 v2.h, 0xff, v4.l
; GFX11-SDAG-NEXT: v_sub_nc_u16 v3.l, v2.h, v2.l clamp
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:1024 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB13_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: v_mov_b16_e32 v0.l, v3.l
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_offset_8:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: global_load_b32 v3, v[0:1], off offset:1024
; GFX12-SDAG-NEXT: v_and_b32_e32 v2, 0xff, v2
; GFX12-SDAG-NEXT: s_mov_b32 s0, 0
; GFX12-SDAG-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_b32_e32 v3, 0xff, v4
; GFX12-SDAG-NEXT: v_sub_nc_u16 v3, v3, v2 clamp
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX12-SDAG-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB13_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%gep = getelementptr i8, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i8 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret i8 %ret
}
define void @global_atomic_usub_sat_nortn_8(ptr addrspace(1) %ptr, i8 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_nortn_8:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v3, v[0:1], off
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: v_lshlrev_b16_e32 v4, 8, v2
; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xff
; GFX9-GISEL-NEXT: v_mov_b32_e32 v6, 0xffffff00
; GFX9-GISEL-NEXT: .LBB14_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_lshlrev_b16_e32 v2, 8, v3
; GFX9-GISEL-NEXT: v_sub_u16_e64 v2, v2, v4 clamp
; GFX9-GISEL-NEXT: v_and_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX9-GISEL-NEXT: v_and_or_b32 v2, v3, v6, v2
; GFX9-GISEL-NEXT: global_atomic_cmpswap v2, v[0:1], v[2:3], off glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, v2
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB14_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_nortn_8:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: global_load_dword v3, v[0:1], off
; GFX10-GISEL-NEXT: v_lshlrev_b16 v4, 8, v2
; GFX10-GISEL-NEXT: v_mov_b32_e32 v5, 0xff
; GFX10-GISEL-NEXT: s_mov_b32 s4, 0
; GFX10-GISEL-NEXT: .LBB14_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: v_lshlrev_b16 v2, 8, v3
; GFX10-GISEL-NEXT: v_sub_nc_u16 v2, v2, v4 clamp
; GFX10-GISEL-NEXT: v_and_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX10-GISEL-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_cmpswap v2, v[0:1], v[2:3], off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, v2
; GFX10-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB14_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_nortn_8:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: global_load_b32 v4, v[0:1], off
; GFX11-GISEL-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
; GFX11-GISEL-NEXT: s_mov_b32 s0, 0
; GFX11-GISEL-NEXT: .p2align 6
; GFX11-GISEL-NEXT: .LBB14_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: v_lshlrev_b16 v2.h, 8, v4.l
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_sub_nc_u16 v2.h, v2.h, v2.l clamp
; GFX11-GISEL-NEXT: v_lshrrev_b16 v3.l, 8, v2.h
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_b32_e32 v3, 0xff, v3
; GFX11-GISEL-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX11-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB14_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_nortn_8:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_load_b32 v3, v[0:1], off
; GFX12-GISEL-NEXT: v_lshlrev_b16 v4, 8, v2
; GFX12-GISEL-NEXT: s_mov_b32 s0, 0
; GFX12-GISEL-NEXT: .LBB14_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: v_lshlrev_b16 v2, 8, v3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_sub_nc_u16 v2, v2, v4 clamp
; GFX12-GISEL-NEXT: v_lshrrev_b16 v2, 8, v2
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_b32_e32 v2, 0xff, v2
; GFX12-GISEL-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX12-GISEL-NEXT: v_mov_b32_e32 v3, v2
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB14_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_nortn_8:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v4, v[0:1], off
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: s_movk_i32 s6, 0xff00
; GFX9-SDAG-NEXT: .LBB14_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_sub_u16_sdwa v3, v4, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
; GFX9-SDAG-NEXT: v_and_or_b32 v3, v4, s6, v3
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB14_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_nortn_8:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: global_load_dword v3, v[0:1], off
; GFX10-SDAG-NEXT: v_and_b32_e32 v4, 0xff, v2
; GFX10-SDAG-NEXT: s_mov_b32 s4, 0
; GFX10-SDAG-NEXT: .LBB14_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: v_and_b32_e32 v2, 0xff, v3
; GFX10-SDAG-NEXT: v_sub_nc_u16 v2, v2, v4 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX10-SDAG-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_cmpswap v2, v[0:1], v[2:3], off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, v2
; GFX10-SDAG-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB14_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_nortn_8:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: global_load_b32 v4, v[0:1], off
; GFX11-SDAG-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-SDAG-NEXT: s_mov_b32 s0, 0
; GFX11-SDAG-NEXT: .LBB14_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: v_and_b16 v2.h, 0xff, v4.l
; GFX11-SDAG-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_sub_nc_u16 v3.l, v2.h, v2.l clamp
; GFX11-SDAG-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX11-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB14_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_nortn_8:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: global_load_b32 v3, v[0:1], off
; GFX12-SDAG-NEXT: v_and_b32_e32 v4, 0xff, v2
; GFX12-SDAG-NEXT: s_mov_b32 s0, 0
; GFX12-SDAG-NEXT: .LBB14_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: v_and_b32_e32 v2, 0xff, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_sub_nc_u16 v2, v2, v4 clamp
; GFX12-SDAG-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX12-SDAG-NEXT: v_mov_b32_e32 v3, v2
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB14_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%ret = atomicrmw usub_sat ptr addrspace(1) %ptr, i8 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret void
}
define void @global_atomic_usub_sat_offset_nortn_8(ptr addrspace(1) %ptr, i8 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_offset_nortn_8:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v3, v[0:1], off offset:1024
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: v_lshlrev_b16_e32 v4, 8, v2
; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xff
; GFX9-GISEL-NEXT: v_mov_b32_e32 v6, 0xffffff00
; GFX9-GISEL-NEXT: .LBB15_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_lshlrev_b16_e32 v2, 8, v3
; GFX9-GISEL-NEXT: v_sub_u16_e64 v2, v2, v4 clamp
; GFX9-GISEL-NEXT: v_and_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX9-GISEL-NEXT: v_and_or_b32 v2, v3, v6, v2
; GFX9-GISEL-NEXT: global_atomic_cmpswap v2, v[0:1], v[2:3], off offset:1024 glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, v2
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB15_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_offset_nortn_8:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: global_load_dword v3, v[0:1], off offset:1024
; GFX10-GISEL-NEXT: v_lshlrev_b16 v4, 8, v2
; GFX10-GISEL-NEXT: v_mov_b32_e32 v5, 0xff
; GFX10-GISEL-NEXT: s_mov_b32 s4, 0
; GFX10-GISEL-NEXT: .LBB15_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: v_lshlrev_b16 v2, 8, v3
; GFX10-GISEL-NEXT: v_sub_nc_u16 v2, v2, v4 clamp
; GFX10-GISEL-NEXT: v_and_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX10-GISEL-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_cmpswap v2, v[0:1], v[2:3], off offset:1024 glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, v2
; GFX10-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB15_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_offset_nortn_8:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: global_load_b32 v4, v[0:1], off offset:1024
; GFX11-GISEL-NEXT: v_lshlrev_b16 v2.l, 8, v2.l
; GFX11-GISEL-NEXT: s_mov_b32 s0, 0
; GFX11-GISEL-NEXT: .p2align 6
; GFX11-GISEL-NEXT: .LBB15_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: v_lshlrev_b16 v2.h, 8, v4.l
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_sub_nc_u16 v2.h, v2.h, v2.l clamp
; GFX11-GISEL-NEXT: v_lshrrev_b16 v3.l, 8, v2.h
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_b32_e32 v3, 0xff, v3
; GFX11-GISEL-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:1024 glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX11-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB15_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_offset_nortn_8:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_load_b32 v3, v[0:1], off offset:1024
; GFX12-GISEL-NEXT: v_lshlrev_b16 v4, 8, v2
; GFX12-GISEL-NEXT: s_mov_b32 s0, 0
; GFX12-GISEL-NEXT: .LBB15_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: v_lshlrev_b16 v2, 8, v3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_sub_nc_u16 v2, v2, v4 clamp
; GFX12-GISEL-NEXT: v_lshrrev_b16 v2, 8, v2
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_b32_e32 v2, 0xff, v2
; GFX12-GISEL-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX12-GISEL-NEXT: v_mov_b32_e32 v3, v2
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB15_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_offset_nortn_8:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v4, v[0:1], off offset:1024
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: s_movk_i32 s6, 0xff00
; GFX9-SDAG-NEXT: .LBB15_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_sub_u16_sdwa v3, v4, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
; GFX9-SDAG-NEXT: v_and_or_b32 v3, v4, s6, v3
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off offset:1024 glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB15_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_offset_nortn_8:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: global_load_dword v3, v[0:1], off offset:1024
; GFX10-SDAG-NEXT: v_and_b32_e32 v4, 0xff, v2
; GFX10-SDAG-NEXT: s_mov_b32 s4, 0
; GFX10-SDAG-NEXT: .LBB15_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: v_and_b32_e32 v2, 0xff, v3
; GFX10-SDAG-NEXT: v_sub_nc_u16 v2, v2, v4 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX10-SDAG-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_cmpswap v2, v[0:1], v[2:3], off offset:1024 glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, v2
; GFX10-SDAG-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB15_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s4
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_offset_nortn_8:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: global_load_b32 v4, v[0:1], off offset:1024
; GFX11-SDAG-NEXT: v_and_b16 v2.l, 0xff, v2.l
; GFX11-SDAG-NEXT: s_mov_b32 s0, 0
; GFX11-SDAG-NEXT: .LBB15_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: v_and_b16 v2.h, 0xff, v4.l
; GFX11-SDAG-NEXT: v_mov_b16_e32 v3.h, 0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_sub_nc_u16 v3.l, v2.h, v2.l clamp
; GFX11-SDAG-NEXT: v_and_or_b32 v3, 0xffffff00, v4, v3
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v3, v[0:1], v[3:4], off offset:1024 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v4
; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX11-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB15_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_offset_nortn_8:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: global_load_b32 v3, v[0:1], off offset:1024
; GFX12-SDAG-NEXT: v_and_b32_e32 v4, 0xff, v2
; GFX12-SDAG-NEXT: s_mov_b32 s0, 0
; GFX12-SDAG-NEXT: .LBB15_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: v_and_b32_e32 v2, 0xff, v3
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_sub_nc_u16 v2, v2, v4 clamp
; GFX12-SDAG-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX12-SDAG-NEXT: v_mov_b32_e32 v3, v2
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB15_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s0
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%gep = getelementptr i8, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i8 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret void
}
define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_8(ptr addrspace(1) %ptr, i8 %data, ptr addrspace(1) %dst) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_8:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX9-GISEL-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX9-GISEL-NEXT: s_mov_b64 s[2:3], 0
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 0xff
; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0xffffff00
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: s_load_dword s5, s[0:1], 0x400
; GFX9-GISEL-NEXT: s_lshl_b32 s4, s4, 8
; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, s5
; GFX9-GISEL-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX9-GISEL-NEXT: v_lshlrev_b16_e32 v3, 8, v4
; GFX9-GISEL-NEXT: v_sub_u16_e64 v3, v3, s4 clamp
; GFX9-GISEL-NEXT: v_and_b32_sdwa v3, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX9-GISEL-NEXT: v_and_or_b32 v3, v4, v1, v3
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v2, v[3:4], s[0:1] offset:1024 glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-GISEL-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB16_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x10
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: global_store_byte v0, v3, s[0:1]
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_8:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x1
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-GISEL-NEXT: s_load_dword s3, s[8:9], 0x8
; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0xff
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: s_load_dword s2, s[0:1], 0x400
; GFX10-GISEL-NEXT: s_lshl_b32 s3, s3, 8
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, s2
; GFX10-GISEL-NEXT: s_mov_b32 s2, 0
; GFX10-GISEL-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, v2
; GFX10-GISEL-NEXT: v_lshlrev_b16 v2, 8, v3
; GFX10-GISEL-NEXT: v_sub_nc_u16 v2, v2, s3 clamp
; GFX10-GISEL-NEXT: v_and_b32_sdwa v2, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX10-GISEL-NEXT: v_and_or_b32 v2, 0xffffff00, v3, v2
; GFX10-GISEL-NEXT: global_atomic_cmpswap v2, v0, v[2:3], s[0:1] offset:1024 glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3
; GFX10-GISEL-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s2
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB16_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s2
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x10
; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: global_store_byte v0, v2, s[0:1]
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_8:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-GISEL-NEXT: s_load_b32 s3, s[4:5], 0x8
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: s_load_b32 s2, s[0:1], 0x400
; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX11-GISEL-NEXT: s_lshl_b32 s3, s3, 8
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, s2
; GFX11-GISEL-NEXT: s_mov_b32 s2, 0
; GFX11-GISEL-NEXT: .p2align 6
; GFX11-GISEL-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, v1
; GFX11-GISEL-NEXT: v_lshlrev_b16 v1.l, 8, v2.l
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_sub_nc_u16 v1.l, v1.l, s3 clamp
; GFX11-GISEL-NEXT: v_lshrrev_b16 v1.l, 8, v1.l
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_b32_e32 v1, 0xff, v1
; GFX11-GISEL-NEXT: v_and_or_b32 v1, 0xffffff00, v2, v1
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:1024 glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
; GFX11-GISEL-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB16_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s2
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: global_store_b8 v0, v1, s[0:1]
; GFX11-GISEL-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_8:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_load_b32 s3, s[0:1], 0x400
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX12-GISEL-NEXT: s_lshl_b32 s2, s2, 8
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, s3
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0
; GFX12-GISEL-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, v1
; GFX12-GISEL-NEXT: v_lshlrev_b16 v1, 8, v2
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_sub_nc_u16 v1, v1, s2 clamp
; GFX12-GISEL-NEXT: v_lshrrev_b16 v1, 8, v1
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_b32_e32 v1, 0xff, v1
; GFX12-GISEL-NEXT: v_and_or_b32 v1, 0xffffff00, v2, v1
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB16_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s3
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b8 v0, v1, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_8:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX9-SDAG-NEXT: s_load_dword s5, s[8:9], 0x8
; GFX9-SDAG-NEXT: s_mov_b64 s[2:3], 0
; GFX9-SDAG-NEXT: s_movk_i32 s4, 0xff00
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: s_load_dword s6, s[0:1], 0x400
; GFX9-SDAG-NEXT: s_and_b32 s5, s5, 0xff
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s6
; GFX9-SDAG-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, v0
; GFX9-SDAG-NEXT: v_sub_u16_sdwa v0, v3, s5 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX9-SDAG-NEXT: v_and_or_b32 v2, v3, s4, v0
; GFX9-SDAG-NEXT: global_atomic_cmpswap v0, v1, v[2:3], s[0:1] offset:1024 glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v0, v3
; GFX9-SDAG-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB16_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x10
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: global_store_byte v1, v0, s[0:1]
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_8:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x1
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-SDAG-NEXT: s_load_dword s3, s[8:9], 0x8
; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: s_load_dword s2, s[0:1], 0x400
; GFX10-SDAG-NEXT: s_and_b32 s3, s3, 0xff
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s2
; GFX10-SDAG-NEXT: s_mov_b32 s2, 0
; GFX10-SDAG-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, v1
; GFX10-SDAG-NEXT: v_and_b32_e32 v1, 0xff, v2
; GFX10-SDAG-NEXT: v_sub_nc_u16 v1, v1, s3 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX10-SDAG-NEXT: v_and_or_b32 v1, 0xffffff00, v2, v1
; GFX10-SDAG-NEXT: global_atomic_cmpswap v1, v0, v[1:2], s[0:1] offset:1024 glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
; GFX10-SDAG-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s2
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB16_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s2
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x10
; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: global_store_byte v0, v1, s[0:1]
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_8:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-SDAG-NEXT: s_load_b32 s3, s[4:5], 0x8
; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: s_load_b32 s2, s[0:1], 0x400
; GFX11-SDAG-NEXT: s_and_b32 s3, s3, 0xff
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s2
; GFX11-SDAG-NEXT: s_mov_b32 s2, 0
; GFX11-SDAG-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, v1
; GFX11-SDAG-NEXT: v_mov_b16_e32 v1.h, 0
; GFX11-SDAG-NEXT: v_and_b16 v1.l, 0xff, v2.l
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_sub_nc_u16 v1.l, v1.l, s3 clamp
; GFX11-SDAG-NEXT: v_and_or_b32 v1, 0xffffff00, v2, v1
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:1024 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
; GFX11-SDAG-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB16_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s2
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: global_store_b8 v0, v1, s[0:1]
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_8:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x400
; GFX12-SDAG-NEXT: s_and_b32 s2, s2, 0xff
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0
; GFX12-SDAG-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, v1
; GFX12-SDAG-NEXT: v_and_b32_e32 v1, 0xff, v2
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_sub_nc_u16 v1, v1, s2 clamp
; GFX12-SDAG-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_or_b32 v1, 0xffffff00, v2, v1
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v1, v0, v[1:2], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB16_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_or_b32 exec_lo, exec_lo, s3
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x10
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: global_store_b8 v0, v1, s[0:1]
; GFX12-SDAG-NEXT: s_endpgm
%gep = getelementptr i8, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i8 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
store i8 %ret, ptr addrspace(1) %dst
ret void
}
define amdgpu_kernel void @global_atomic_usub_sat_sgpr_base_offset_nortn_8(ptr addrspace(1) %ptr, i8 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_8:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX9-GISEL-NEXT: s_load_dword s4, s[8:9], 0x8
; GFX9-GISEL-NEXT: s_mov_b64 s[2:3], 0
; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xff
; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xffffff00
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: s_load_dword s5, s[0:1], 0x400
; GFX9-GISEL-NEXT: s_lshl_b32 s4, s4, 8
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, s5
; GFX9-GISEL-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: v_lshlrev_b16_e32 v0, 8, v1
; GFX9-GISEL-NEXT: v_sub_u16_e64 v0, v0, s4 clamp
; GFX9-GISEL-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX9-GISEL-NEXT: v_and_or_b32 v0, v1, v3, v0
; GFX9-GISEL-NEXT: global_atomic_cmpswap v0, v4, v[0:1], s[0:1] offset:1024 glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GFX9-GISEL-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, v0
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB17_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_8:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x1
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-GISEL-NEXT: s_load_dword s3, s[8:9], 0x8
; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0
; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0xff
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: s_load_dword s2, s[0:1], 0x400
; GFX10-GISEL-NEXT: s_lshl_b32 s3, s3, 8
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, s2
; GFX10-GISEL-NEXT: s_mov_b32 s2, 0
; GFX10-GISEL-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX10-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-GISEL-NEXT: v_lshlrev_b16 v0, 8, v1
; GFX10-GISEL-NEXT: v_sub_nc_u16 v0, v0, s3 clamp
; GFX10-GISEL-NEXT: v_and_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX10-GISEL-NEXT: v_and_or_b32 v0, 0xffffff00, v1, v0
; GFX10-GISEL-NEXT: global_atomic_cmpswap v0, v2, v[0:1], s[0:1] offset:1024 glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, v0
; GFX10-GISEL-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX10-GISEL-NEXT: s_andn2_b32 exec_lo, exec_lo, s2
; GFX10-GISEL-NEXT: s_cbranch_execnz .LBB17_1
; GFX10-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_8:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-GISEL-NEXT: s_load_b32 s3, s[4:5], 0x8
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: s_load_b32 s2, s[0:1], 0x400
; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0
; GFX11-GISEL-NEXT: s_lshl_b32 s3, s3, 8
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, s2
; GFX11-GISEL-NEXT: s_mov_b32 s2, 0
; GFX11-GISEL-NEXT: .p2align 6
; GFX11-GISEL-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX11-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_lshlrev_b16 v0.l, 8, v1.l
; GFX11-GISEL-NEXT: v_sub_nc_u16 v0.l, v0.l, s3 clamp
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_lshrrev_b16 v0.l, 8, v0.l
; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0xff, v0
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_or_b32 v0, 0xffffff00, v1, v0
; GFX11-GISEL-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:1024 glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX11-GISEL-NEXT: v_mov_b32_e32 v1, v0
; GFX11-GISEL-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX11-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX11-GISEL-NEXT: s_cbranch_execnz .LBB17_1
; GFX11-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-GISEL-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_8:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_load_b32 s3, s[0:1], 0x400
; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
; GFX12-GISEL-NEXT: s_lshl_b32 s2, s2, 8
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, s3
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0
; GFX12-GISEL-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX12-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_lshlrev_b16 v0, 8, v1
; GFX12-GISEL-NEXT: v_sub_nc_u16 v0, v0, s2 clamp
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_lshrrev_b16 v0, 8, v0
; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0xff, v0
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_and_or_b32 v0, 0xffffff00, v1, v0
; GFX12-GISEL-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX12-GISEL-NEXT: v_mov_b32_e32 v1, v0
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX12-GISEL-NEXT: s_cbranch_execnz .LBB17_1
; GFX12-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_8:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX9-SDAG-NEXT: s_load_dword s5, s[8:9], 0x8
; GFX9-SDAG-NEXT: s_mov_b64 s[2:3], 0
; GFX9-SDAG-NEXT: s_movk_i32 s4, 0xff00
; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: s_load_dword s6, s[0:1], 0x400
; GFX9-SDAG-NEXT: s_and_b32 s5, s5, 0xff
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, s6
; GFX9-SDAG-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: v_sub_u16_sdwa v0, v1, s5 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX9-SDAG-NEXT: v_and_or_b32 v0, v1, s4, v0
; GFX9-SDAG-NEXT: global_atomic_cmpswap v0, v2, v[0:1], s[0:1] offset:1024 glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GFX9-SDAG-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB17_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_8:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x1
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; GFX10-SDAG-NEXT: s_load_dword s3, s[8:9], 0x8
; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: s_load_dword s2, s[0:1], 0x400
; GFX10-SDAG-NEXT: s_and_b32 s3, s3, 0xff
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, s2
; GFX10-SDAG-NEXT: s_mov_b32 s2, 0
; GFX10-SDAG-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX10-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0xff, v1
; GFX10-SDAG-NEXT: v_sub_nc_u16 v0, v0, s3 clamp
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX10-SDAG-NEXT: v_and_or_b32 v0, 0xffffff00, v1, v0
; GFX10-SDAG-NEXT: global_atomic_cmpswap v0, v2, v[0:1], s[0:1] offset:1024 glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX10-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX10-SDAG-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX10-SDAG-NEXT: s_andn2_b32 exec_lo, exec_lo, s2
; GFX10-SDAG-NEXT: s_cbranch_execnz .LBB17_1
; GFX10-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_8:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
; GFX11-SDAG-NEXT: s_load_b32 s3, s[4:5], 0x8
; GFX11-SDAG-NEXT: v_mov_b32_e32 v2, 0
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: s_load_b32 s2, s[0:1], 0x400
; GFX11-SDAG-NEXT: s_and_b32 s3, s3, 0xff
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, s2
; GFX11-SDAG-NEXT: s_mov_b32 s2, 0
; GFX11-SDAG-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX11-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT: v_and_b16 v0.l, 0xff, v1.l
; GFX11-SDAG-NEXT: v_mov_b16_e32 v0.h, 0
; GFX11-SDAG-NEXT: v_sub_nc_u16 v0.l, v0.l, s3 clamp
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_or_b32 v0, 0xffffff00, v1, v0
; GFX11-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:1024 glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX11-SDAG-NEXT: s_or_b32 s2, vcc_lo, s2
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s2
; GFX11-SDAG-NEXT: s_cbranch_execnz .LBB17_1
; GFX11-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat_sgpr_base_offset_nortn_8:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_load_b32 s3, s[0:1], 0x400
; GFX12-SDAG-NEXT: s_and_b32 s2, s2, 0xff
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0
; GFX12-SDAG-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX12-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0xff, v1
; GFX12-SDAG-NEXT: v_sub_nc_u16 v0, v0, s2 clamp
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0xffff, v0
; GFX12-SDAG-NEXT: v_and_or_b32 v0, 0xffffff00, v1, v0
; GFX12-SDAG-NEXT: global_atomic_cmpswap_b32 v0, v2, v[0:1], s[0:1] offset:1024 th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v0, v1
; GFX12-SDAG-NEXT: v_mov_b32_e32 v1, v0
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_or_b32 s3, vcc_lo, s3
; GFX12-SDAG-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-SDAG-NEXT: s_and_not1_b32 exec_lo, exec_lo, s3
; GFX12-SDAG-NEXT: s_cbranch_execnz .LBB17_1
; GFX12-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX12-SDAG-NEXT: s_endpgm
%gep = getelementptr i8, ptr addrspace(1) %ptr, i64 1024
%ret = atomicrmw usub_sat ptr addrspace(1) %gep, i8 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret void
}
define i32 @global_atomic_usub_sat__amdgpu_no_remote_memory(ptr addrspace(1) %ptr, i32 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_remote_memory:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v3, v[0:1], off
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: .LBB18_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX9-GISEL-NEXT: v_sub_u32_e64 v3, v4, v2 clamp
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB18_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_remote_memory:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_remote_memory:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_remote_memory:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_remote_memory:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v3, v[0:1], off
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: .LBB18_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: v_sub_u32_e64 v3, v4, v2 clamp
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB18_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_remote_memory:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_remote_memory:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_remote_memory:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%ret = atomicrmw usub_sat ptr addrspace(1) %ptr, i32 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.remote.memory !0
ret i32 %ret
}
define i32 @global_atomic_usub_sat__amdgpu_no_fine_grained_memory(ptr addrspace(1) %ptr, i32 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v3, v[0:1], off
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: .LBB19_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX9-GISEL-NEXT: v_sub_u32_e64 v3, v4, v2 clamp
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB19_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v3, v[0:1], off
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: .LBB19_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: v_sub_u32_e64 v3, v4, v2 clamp
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB19_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%ret = atomicrmw usub_sat ptr addrspace(1) %ptr, i32 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !0
ret i32 %ret
}
define i32 @global_atomic_usub_sat__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory(ptr addrspace(1) %ptr, i32 %data) {
; GFX9-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: global_load_dword v3, v[0:1], off
; GFX9-GISEL-NEXT: s_mov_b64 s[4:5], 0
; GFX9-GISEL-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX9-GISEL-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, v3
; GFX9-GISEL-NEXT: v_sub_u32_e64 v3, v4, v2 clamp
; GFX9-GISEL-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: buffer_wbinvl1_vol
; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-GISEL-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: s_cbranch_execnz .LBB20_1
; GFX9-GISEL-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-GISEL-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, v3
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-GISEL-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX10-GISEL-NEXT: buffer_gl1_inv
; GFX10-GISEL-NEXT: buffer_gl0_inv
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-GISEL-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX11-GISEL-NEXT: buffer_gl1_inv
; GFX11-GISEL-NEXT: buffer_gl0_inv
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_wait_storecnt 0x0
; GFX12-GISEL-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
; GFX12-GISEL-NEXT: global_inv scope:SCOPE_DEV
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: global_load_dword v3, v[0:1], off
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], 0
; GFX9-SDAG-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX9-SDAG-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX9-SDAG-NEXT: v_sub_u32_e64 v3, v4, v2 clamp
; GFX9-SDAG-NEXT: global_atomic_cmpswap v3, v[0:1], v[3:4], off glc
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX9-SDAG-NEXT: buffer_wbinvl1_vol
; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX9-SDAG-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX9-SDAG-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: s_cbranch_execnz .LBB20_1
; GFX9-SDAG-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-SDAG-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v3
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-SDAG-NEXT: global_atomic_csub v0, v[0:1], v2, off glc
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX10-SDAG-NEXT: buffer_gl1_inv
; GFX10-SDAG-NEXT: buffer_gl0_inv
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX11-SDAG-NEXT: buffer_gl1_inv
; GFX11-SDAG-NEXT: buffer_gl0_inv
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: global_atomic_usub_sat__amdgpu_no_fine_grained_memory__amdgpu_no_remote_memory:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_wait_storecnt 0x0
; GFX12-SDAG-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX12-SDAG-NEXT: global_inv scope:SCOPE_DEV
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
%ret = atomicrmw usub_sat ptr addrspace(1) %ptr, i32 %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !0, !amdgpu.no.remote.memory !0
ret i32 %ret
}
attributes #0 = { nounwind willreturn }
attributes #1 = { argmemonly nounwind }
!0 = !{}