)]}'
{
  "commit": "de70798fa7eded558c3f43dc4c7d723071fa6e9e",
  "tree": "1e5068b34f43f46932cb9bcd998f1fa5038138ad",
  "parents": [
    "877a13169d4cc9f943ae776d84a5c80aa77e0096",
    "768fc10e9dcbf84397e022aa7922a265570cd8c6"
  ],
  "author": {
    "name": "Jonathan Brouwer",
    "email": "jonathantbrouwer@gmail.com",
    "time": "Mon Jun 08 17:11:05 2026 +0200"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Mon Jun 08 17:11:05 2026 +0200"
  },
  "message": "Rollup merge of #147302 - esp-rs:xtensa-asm, r\u003dAmanieu\n\nasm! support for the Xtensa architecture\n\nThis implements the asm! support for Xtensa. We\u0027ve been using this code for a few years in [our fork](https://github.com/esp-rs/rust) and it\u0027s been working well. I finally found some time to clean it up a bit and start the upstreaming process. This should be one of the final PRs for Xtensa support on the Rust side (minus bug fixes of course). After this, we\u0027re mostly just waiting on the LLVM upstreaming which is going well. This PR doesn\u0027t cover all possible asm options for Xtensa, but the base ISA plus a few extras that are used in Espressif chips.\n\nr? Amanieu\n",
  "tree_diff": []
}