)]}'
{
  "commit": "dde9a66ebbb3ef32efe362aba33db5a696f9ddc7",
  "tree": "2c9a8cd71e20e0bdf6a1379656c9d7db6c8c312d",
  "parents": [
    "0cd9b3bff48634776255789cfb7e7f57142ce44d",
    "e699f5a6b64e40daa400ed7f00a9cb4c3905b0d1"
  ],
  "author": {
    "name": "Jacob Pratt",
    "email": "jacob@jhpratt.dev",
    "time": "Thu Jun 11 23:15:16 2026 -0400"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Thu Jun 11 23:15:16 2026 -0400"
  },
  "message": "Rollup merge of #149793 - Flakebi:inline-asm, r\u003dAmanieu\n\nAdd inline asm support for amdgpu\n\nAdd support for inline assembly for the amdgpu backend (the\namdgcn-amd-amdhsa target).\nAdd register classes for `vgpr` (vector general purpose register) and\n`sgpr` (scalar general purpose register).\nThe LLVM backend supports two more classes, `reg`, which is either VGPR\nor SGPR, up to the compiler to decide. As instructions often rely on a\nregister being either a VGPR or SGPR for the assembly to be valid, reg\ndoesn’t seem that useful (I struggled to write correct tests for it), so\nI didn’t end up adding it.\nThe fourth register class is AGPRs, which only exist on some hardware\nversions (not the consumer ones) and they have restricted ways to write\nand read from them, which makes it hard to write a Rust variable into\nthem. They could be used inside assembly blocks, but I didn’t add them\nas Rust register class.\n\nThere are a few change affecting general inline assembly code, that is\n`InlineAsmReg::name()` now returns a `Cow` instead of a `\u0026\u0027static str`.\nBecause amdgpu has many registers, 256 VGPRs plus combinations of 2 or 4\nVGPRs, and I didn’t want to list hundreds of static strings, the amdgpu\nreg stores the register number(s) and a non-static String is generated\nat runtime for the register name.\nSimilar for register classes and supported_types.\n\nVectors of 64-bit types are supported by the LLVM backend, but omitted\nhere to make the code simpler. There is currently no systematic support\nin LLVM of which vectors of 64-bit types are supported. Also, they are\nlikely seldomly unused, vectors of 16- and 32-bit types are important.\n\nTracking issue: rust-lang/rust#135024\n",
  "tree_diff": []
}