)]}'
{
  "commit": "d0c52fbd554fa97558791e90e96eb1e6167a5b49",
  "tree": "779b9baf8486af5c0e5484de8fb7c23fab94184a",
  "parents": [
    "15dc6cd62c0af11c655b327fdf25ceec07798729",
    "b68b9bc201d6b9284c596657855ee8797316b227"
  ],
  "author": {
    "name": "Jonathan Brouwer",
    "email": "jonathantbrouwer@gmail.com",
    "time": "Sun Aug 02 16:19:26 2026 +0200"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Sun Aug 02 16:19:26 2026 +0200"
  },
  "message": "Rollup merge of #159525 - folkertdev:stabilize-x86-i128-asm, r\u003dAmanieu\n\nStabilize passing 128-bit integers via vector registers with `asm!` on x86\n\ntracking issue: https://github.com/rust-lang/rust/issues/133416\nreference PR: https://github.com/rust-lang/reference/pull/2313\n\n# Stabilization report\n\n## Summary\n\nStabilize passing 128-bit integers via vector registers with `asm!` on x86 and x86_64:\n\n```rust\n// Use 128-bit integers with vector registers.\nlet mut v \u003d 0u128;\n\nasm!(\"/* {:x} */\", in(xmm_reg) v);\nasm!(\"/* {:x} */\", out(xmm_reg) v);\n\nasm!(\"/* {:y} */\", in(ymm_reg) v);\nasm!(\"/* {:y} */\", out(ymm_reg) v);\n\nasm!(\"/* {:z} */\", in(zmm_reg) v);\nasm!(\"/* {:z} */\", out(zmm_reg) v);\n```\n\n32-bit and 64-bit integer types can already be passed via vector registers. LLVM has supported 128-bit integers since 2019, see https://github.com/llvm/llvm-project/issues/42502, so `rustc` not supporting them seems like an oversight.\n\nThis feature is part of [`asm_experimental_reg`](https://github.com/rust-lang/rust/issues/133416). We\u0027re not stabilizing that feature as a whole, but only pull out part of it.\n\n## History\n\n- https://github.com/rust-lang/rust/pull/151059\n\n## Open questions\n\nNone.\n\nr? Amanieu\n",
  "tree_diff": []
}