)]}'
{
  "commit": "b1818677386905dbc834f9aa1449daf2d669c718",
  "tree": "8230bafe44612a9d3e1f4d7baa7110cff594d9f3",
  "parents": [
    "e6c0129553cf1e8605b6ece59984c7c29a4380d2"
  ],
  "author": {
    "name": "David Wood",
    "email": "david.wood2@arm.com",
    "time": "Tue Apr 14 01:09:25 2026 +0000"
  },
  "committer": {
    "name": "David Wood",
    "email": "david.wood2@arm.com",
    "time": "Tue Apr 14 02:59:59 2026 +0000"
  },
  "message": "gen-arm: `assert_instr` on msvc for `[su]mull[tb]`\n\n`dumpbin.exe` produces `44a1c000`/`44e1c000`/`44a1c400`/`44e1c400` for\n`[su]mull[tb]` instead of the instruction name - so skip `assert_instr`\nfor these intrinsics on MSVC targets.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "79be8a88890c7cc6faf09658e42378ac42b6a092",
      "old_mode": 33188,
      "old_path": "library/stdarch/crates/core_arch/src/aarch64/sve2/generated.rs",
      "new_id": "c5b0149c9c302ec935a04f7443d848a300bd9fda",
      "new_mode": 33188,
      "new_path": "library/stdarch/crates/core_arch/src/aarch64/sve2/generated.rs"
    },
    {
      "type": "modify",
      "old_id": "6365bea21b5111d877e5b7b95a798c22dba2c96c",
      "old_mode": 33188,
      "old_path": "library/stdarch/crates/stdarch-gen-arm/spec/sve2/aarch64.spec.yml",
      "new_id": "269d7ff0eacbb33207377b2013b38325bc86fd2a",
      "new_mode": 33188,
      "new_path": "library/stdarch/crates/stdarch-gen-arm/spec/sve2/aarch64.spec.yml"
    }
  ]
}
