)]}'
{
  "commit": "3fb712c80a00a35771c56c9dd9d5cb18e5396160",
  "tree": "86c6e71c1912e9933bf5b52e9f773b4e7545390e",
  "parents": [
    "b040d5493eed3cb74ae77cc06bd128df9ca31dc1",
    "aa9da4b85922f34ba2cb7f6c7b3f8068a5d55e85"
  ],
  "author": {
    "name": "Jonathan Brouwer",
    "email": "jonathantbrouwer@gmail.com",
    "time": "Wed Apr 08 23:04:34 2026 +0200"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Apr 08 23:04:34 2026 +0200"
  },
  "message": "Rollup merge of #154719 - androm3da:hexagon-inline-asm-register-classes, r\u003dJohnTitor\n\nHexagon inline asm: add reg_pair, vreg, vreg_pair, and qreg register classes\n\nAdd three new register classes for the Hexagon inline assembly backend:\n\n* `reg_pair`: GPR double registers (r1:0 through r27:26)\n* `vreg`: HVX vector registers (v0-v31)\n* `qreg`: HVX predicate registers (q0-q3), clobber-only for now\n",
  "tree_diff": []
}