tree c172c355db1e948ea75cc614e393e197f3721273
parent e5b7cc8aa09bff37ab388d49e54c948dcec17e67
author Changpeng Fang <changpeng.fang@gmail.com> 1547674373 +0000
committer Changpeng Fang <changpeng.fang@gmail.com> 1547674373 +0000

AMDGPU: Adjust the chain for loads writing to the HI part of a register.

Summary:
  For these loads that write to the HI part of a register, we should chain them to the op that writes to the LO part
of the register to maintain the appropriate order.

Reviewers:
  rampitec, arsenm

Differential Revision:
  https://reviews.llvm.org/D56454

llvm-svn: 351379