commit dd2759e00c7caa92ebfef66b3e27ed26ea493b8d
author Wang, Pengfei <pengfei.wang@intel.com> Fri Nov 27 16:02:09 2020 +0800
committer Nikita Popov <nikita.ppv@googlemail.com> Fri Nov 27 20:30:48 2020 +0100
tree 59ee2c8fe49131ef7b64edbde6b1b4f1b3f2dd12
parent 7ade8dc4b84142abd3e6d1fb8a0f4111b0bbd571

[msan] Fix bugs when instrument x86.avx512*_cvt* intrinsics.

Scalar intrinsics x86.avx512*_cvt* have an extra rounding mode operand.
We can directly ignore it to reuse the SSE/AVX math.
This fix the bug https://bugs.llvm.org/show_bug.cgi?id=48298.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D92206

llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp

diff --git a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
index fcf7f47..8a33721 100644
--- a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
@@ -2635,14 +2635,16 @@
   // We copy the shadow of \p CopyOp[NumUsedElements:] to \p
   // Out[NumUsedElements:]. This means that intrinsics without \p CopyOp always
   // return a fully initialized value.
-  void handleVectorConvertIntrinsic(IntrinsicInst &I, int NumUsedElements) {
+  void handleVectorConvertIntrinsic(IntrinsicInst &I, int NumUsedElements,
+                                    bool HasRoundingMode = false) {
     IRBuilder<> IRB(&I);
     Value *CopyOp, *ConvertOp;
 
-    switch (I.getNumArgOperands()) {
-    case 3:
-      assert(isa<ConstantInt>(I.getArgOperand(2)) && "Invalid rounding mode");
-      LLVM_FALLTHROUGH;
+    assert((!HasRoundingMode ||
+            isa<ConstantInt>(I.getArgOperand(I.getNumArgOperands() - 1))) &&
+           "Invalid rounding mode");
+
+    switch (I.getNumArgOperands() - HasRoundingMode) {
     case 2:
       CopyOp = I.getArgOperand(0);
       ConvertOp = I.getArgOperand(1);
@@ -3179,6 +3181,8 @@
     case Intrinsic::x86_avx512_cvtusi2ss:
     case Intrinsic::x86_avx512_cvtusi642sd:
     case Intrinsic::x86_avx512_cvtusi642ss:
+      handleVectorConvertIntrinsic(I, 1, true);
+      break;
     case Intrinsic::x86_sse2_cvtsd2si64:
     case Intrinsic::x86_sse2_cvtsd2si:
     case Intrinsic::x86_sse2_cvtsd2ss:

llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll

diff --git a/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll b/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
index bb60145..096b101 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/vector_cvt.ll
@@ -9,6 +9,7 @@
 declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone
 declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
 declare x86_mmx @llvm.x86.sse.cvtps2pi(<4 x float>) nounwind readnone
+declare i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float>, i32) nounwind readnone
 
 ; Single argument vector conversion.
 
@@ -45,3 +46,20 @@
 ; CHECK: call x86_mmx @llvm.x86.sse.cvtps2pi
 ; CHECK: store i64 0, {{.*}} @__msan_retval_tls
 ; CHECK: ret x86_mmx
+
+; avx512 rounding conversion.
+
+define i32 @pr48298(<4 x float> %value) sanitize_memory {
+entry:
+  %0 = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %value, i32 11)
+  ret i32 %0
+}
+
+; CHECK-LABEL: @pr48298
+; CHECK: extractelement <4 x i32> {{.*}}, i32 0
+; CHECK: icmp ne i32 {{.*}}, 0
+; CHECK: br
+; CHECK: call void @__msan_warning_with_origin_noreturn
+; CHECK: call i32 @llvm.x86.avx512.vcvtss2usi32
+; CHECK: store i32 0, {{.*}} @__msan_retval_tls
+; CHECK: ret i32