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        "time": "Tue Oct 06 18:16:16 2026 -0400"
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      "message": "libgccjit: Fix UB in gcc_jit_context_new_array_constructor\n"
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        "time": "Thu Oct 09 14:58:10 2025 -0400"
      },
      "committer": {
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        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:16:16 2026 -0400"
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    {
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      "message": "Disable LTO check that makes LTO failing in some cases\n"
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    {
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        "time": "Tue Oct 06 18:16:16 2026 -0400"
      },
      "message": "Add `lvalue::set_name` (#78)\n"
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    {
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      "message": "gcc/jit/ChangeLog: (#77)\n\n* jit-recording.h: Add lvalue::get_name method\n\t* libgccjit.cc (gcc_jit_lvalue_get_name): Likewise\n\t* libgccjit.h (gcc_jit_lvalue_get_name): Likewise\n\t* libgccjit.map: Likewise\n\ngcc/testsuite/ChangeLog:\n\n\t* jit.dg/test-tls.c: Add test for gcc_jit_lvalue_get_name\n"
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        "time": "Tue Oct 06 18:16:15 2026 -0400"
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      "message": "Compile GCC on Ubuntu ARM\n"
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        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:16:15 2026 -0400"
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        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:16:15 2026 -0400"
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        "time": "Tue Oct 06 18:16:14 2026 -0400"
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      "message": "Use rust-lang mirror for downloading GCC dependencies\n"
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        "time": "Tue Oct 06 18:15:34 2026 -0400"
      },
      "message": "libgccjit: Fix for -fanalyzer used in libgccjit\n"
    },
    {
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      "committer": {
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        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:34 2026 -0400"
      },
      "message": "libgccjit: Allow sending a const pointer as argument\n\ngcc/jit/ChangeLog:\n\n\t* jit-recording.h: Remove memento_of_get_const::accepts_writes_from,\n\tmemento_of_get_type::is_same_type_as: new method.\n\ngcc/testsuite/ChangeLog:\n\n\t* jit.dg/all-non-failing-tests.h: Add test-const-pointer-argument.c.\n\t* jit.dg/test-const-pointer-argument.c: New test.\n"
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      "author": {
        "name": "Martin Rodriguez Reboredo",
        "email": "yakoyoku@gmail.com",
        "time": "Wed Jan 03 22:09:19 2024 +0000"
      },
      "committer": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:34 2026 -0400"
      },
      "message": "jit: Fix volatile loads and stores\n\nRelated to PR d/110516 but for libgccjit.\n\n2024-01-03  Martin Rodriguez Reboredo  \u003cyakoyoku@gmail.com\u003e\n\ngcc/jit/\n\t* jit-playback.cc: Append TREE_THIS_VOLATILE and TREE_SIDE_EFFECTS to\n\ta dereference if underlying type is volatile.\n\nSigned-off-by: Martin Rodriguez Reboredo \u003cyakoyoku@gmail.com\u003e\n"
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        "name": "Guillaume Gomez",
        "email": "guillaume1.gomez@gmail.com",
        "time": "Mon Jul 22 17:10:08 2024 +0200"
      },
      "committer": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:34 2026 -0400"
      },
      "message": "Fix licenses\n"
    },
    {
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        "time": "Sun Sep 01 09:34:19 2024 -0400"
      },
      "committer": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:33 2026 -0400"
      },
      "message": "Add support for the weak variable attribute\n"
    },
    {
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        "name": "Guillaume Gomez",
        "email": "guillaume1.gomez@gmail.com",
        "time": "Sun Apr 21 15:43:20 2024 +0200"
      },
      "committer": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:33 2026 -0400"
      },
      "message": "Add `gcc_jit_rvalue_set_type`\n"
    },
    {
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      "tree": "fb3bc05dee427fb7d8675169ecd5615870a7f49f",
      "parents": [
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      ],
      "author": {
        "name": "tempdragon",
        "email": "645703113@qq.com",
        "time": "Sun Feb 18 23:38:48 2024 +0800"
      },
      "committer": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:33 2026 -0400"
      },
      "message": "feat(gccjit): Allow set_loccation to various classes\n\nIncluding:\n1. field\n2. function\n3. rvalue\n"
    },
    {
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      "parents": [
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        "email": "bouanto@zoho.com",
        "time": "Fri Nov 03 17:49:18 2023 -0400"
      },
      "committer": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:33 2026 -0400"
      },
      "message": "Fix get_size of size_t\n"
    },
    {
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      "author": {
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        "email": "bouanto@zoho.com",
        "time": "Sun Apr 16 13:19:20 2023 -0400"
      },
      "committer": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:33 2026 -0400"
      },
      "message": "Fix bug related to the personality function\n"
    },
    {
      "commit": "5f466806553738bf43798cb8443031e10f6a5057",
      "tree": "c64b181caccc7f72b6e96761d64d6f491d52feba",
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        "email": "bouanto@zoho.com",
        "time": "Fri Oct 14 20:38:48 2022 -0400"
      },
      "committer": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:33 2026 -0400"
      },
      "message": "Add support for try/catch\n"
    },
    {
      "commit": "5bf6b926910722bef0e73396b848212cf122034d",
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        "email": "bouanto@zoho.com",
        "time": "Mon Mar 28 21:10:41 2022 -0400"
      },
      "committer": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:33 2026 -0400"
      },
      "message": "Add support for packed struct\n"
    },
    {
      "commit": "53487ffaf53d84897fd1de6c041793ed7fd32824",
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      "author": {
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        "email": "bouanto@zoho.com",
        "time": "Fri Feb 16 12:15:56 2024 -0500"
      },
      "committer": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:33 2026 -0400"
      },
      "message": "Distribute version without 128-bit integers\n"
    },
    {
      "commit": "8ceccd2505e789d2534fae9eb42413cdb3e997db",
      "tree": "f78b985ce4aa4a5c21f6b2dc59e05e873682b7ed",
      "parents": [
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      ],
      "author": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Mon May 31 09:38:14 2021 -0400"
      },
      "committer": {
        "name": "Antoni Boucher",
        "email": "bouanto@zoho.com",
        "time": "Tue Oct 06 18:15:32 2026 -0400"
      },
      "message": "Build and upload artifact on GitHub Actions\n"
    },
    {
      "commit": "1b961bf9d7e76de9a36f93d8749dbe7fae302246",
      "tree": "515ea337ba1181b1e3f4a28d0eb0f928a2169b65",
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      ],
      "author": {
        "name": "Marek Polacek",
        "email": "polacek@redhat.com",
        "time": "Tue Oct 06 12:20:13 2026 -0400"
      },
      "committer": {
        "name": "Marek Polacek",
        "email": "polacek@redhat.com",
        "time": "Tue Oct 06 16:28:13 2026 -0400"
      },
      "message": "c++/reflection: using typename [:ns:]::X; should declare a type [PR127707]\n\nThis fixes a bogus error for\n\n  namespace N { struct S {}; }\n  template\u003cauto ns\u003e void f () {\n    using typename [:ns:]::S;\n    S s;\n  }\n\nIt is a failure to propagate USING_DECL_TYPENAME_P to the USING_DECL\nin case we are not at_class_scope_p.  With that flag set, the dependent\nUSING_DECL will be treated as naming a type.\n\n\tPR c++/127707\n\ngcc/cp/ChangeLog:\n\n\t* name-lookup.cc (finish_nonmember_using_decl): New bool\n\tparameter.  Set USING_DECL_TYPENAME_P if it\u0027s true.\n\t* name-lookup.h (finish_nonmember_using_decl): Adjust\n\tdeclaration.\n\t* parser.cc (finish_using_decl): Pass typename_p to\n\tfinish_nonmember_using_decl.\n\t* pt.cc (tsubst_stmt) \u003ccase DECL_EXPR\u003e: Pass\n\tUSING_DECL_TYPENAME_P to finish_nonmember_using_decl.\n\ngcc/testsuite/ChangeLog:\n\n\t* g++.dg/reflect/ns12.C: New test.\n\nReviewed-by: Jason Merrill \u003cjason@redhat.com\u003e\n"
    },
    {
      "commit": "eeae43a4c615c08ce13ffbd8e882fcf1871a996d",
      "tree": "546cc228f9c0882b8657d462d589505c4503ce50",
      "parents": [
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      ],
      "author": {
        "name": "Aldy Hernandez",
        "email": "aldy@quesejoda.com",
        "time": "Tue Oct 06 05:36:30 2026 +0000"
      },
      "committer": {
        "name": "Aldy Hernandez",
        "email": "aldy@quesejoda.com",
        "time": "Tue Oct 06 17:54:05 2026 +0000"
      },
      "message": "DOM: a constant is never the first operand\n\nClean up some places where we\u0027re scanning for constants on the LHS of\na binary operation.  This never gets tickled as gimple keeps constants\non the RHS.  Don\u0027t touch the MINUS_EXPR case, as subtraction is not\ncommutative.\n\nLikewise for record_edge_info where we have an arm for a conditional\nwith the constant on the left, with a comment saying copy propagation\ncan produce one.  However, fold_stmt canonicalizes the operand order\nof a GIMPLE_COND, so by the time record_edge_info gets it, the\nconstant is on the right.\n\nAssembly is identical with and without this change over a corpus of\n.ii files from a stage1 bootstrap and over the LAPACK Fortran sources,\nand gcov shows the removed code never executes over those files nor\nthe C, C++ and Fortran testsuites.\n\nTested on ppc64le Linux.\n\ngcc/ChangeLog:\n\n\t* tree-ssa-dom.cc (edge_info::derive_equivalences): Remove the\n\tconstant-first arms of the PLUS_EXPR and EQ_EXPR cases.\n\t(record_edge_info): Remove the arm for a constant first operand.\n"
    },
    {
      "commit": "8f91f1288ad46df7038f66e64a8f25ce285480f1",
      "tree": "ba52e1b738c41c87db2f74fb6eae9346206aca63",
      "parents": [
        "91109d7b6eea9b7d2b3c6c3198ef761126af69e8"
      ],
      "author": {
        "name": "Aldy Hernandez",
        "email": "aldy@quesejoda.com",
        "time": "Mon Oct 05 10:48:43 2026 +0000"
      },
      "committer": {
        "name": "Aldy Hernandez",
        "email": "aldy@quesejoda.com",
        "time": "Tue Oct 06 17:54:05 2026 +0000"
      },
      "message": "DOM: stop rewriting comparisons into equalities\n\nInstead of keeping the test_for_singularity() functionality we are now\ndoing with simplify_using_ranges::simplify(), just do\nsimplify_using_ranges::fold_cond() which folds the conditional to a\nconstant if possible, but avoids the singularity transformation.  This\ntransformation isn\u0027t needed as ranger already knows what x is on each\narm of the conditional.  Besides, this transformation was problematic\nfor loop analyzers.\n\nAlso, keep assignments from going through the simplifier, since this\nwas a side-effect of the last patch.\n\nTested on ppc64le Linux.\n\ngcc/ChangeLog:\n\n\t* tree-ssa-dom.cc (dom_opt_dom_walker::simplify_stmt): Rename to...\n\t(dom_opt_dom_walker::fold_cond): ...this.  Fold a conditional with\n\tthe ranger, do not simplify anything else.\n\t(dom_opt_dom_walker::optimize_stmt): Adjust.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.dg/tree-ssa/predcom-7.c: Drop -fno-tree-dominator-opts.\n\t* gcc.dg/tree-ssa/ssa-dom-simplify-3.c: Expect the relationals to\n\tstay.\n"
    },
    {
      "commit": "91109d7b6eea9b7d2b3c6c3198ef761126af69e8",
      "tree": "3a24336ed8016030a7eba99ddc36be9b84ef3ab1",
      "parents": [
        "189b0202e2664ea06e17c5424d2d17151607ee2d"
      ],
      "author": {
        "name": "Michiel Derhaeg",
        "email": "michiel.derhaeg@globalfoundries.com",
        "time": "Fri Aug 28 13:49:07 2026 +0200"
      },
      "committer": {
        "name": "Michiel Derhaeg",
        "email": "michiel.derhaeg@globalfoundries.com",
        "time": "Tue Oct 06 18:52:08 2026 +0200"
      },
      "message": "arc: Correct ctz(0) and clz(0) for ARCompact [PR127117]\n\nCLZ_DEFINED_VALUE_AT_ZERO and CTZ_DEFINED_VALUE_AT_ZERO advertise\nclz(0) \u003d\u003d 31 and ctz(0) \u003d\u003d 31.  When clzsi2 and ctzsi2 expand to the\nARCv2 fls and ffs instructions that holds.\n\nBoth patterns can also be emulated with norm, which currently happens\nfor ARCompact, in that case it returns 32 for a zero operand.\n\nCorrect the two emulation patterns.  In *arc_clzsi2 only increment\nthe norm result when the operand is strictly positive, which leaves a\nzero operand at norm\u0027s own result of 31.  In arc_ctzsi2 produce 31\ninstead of 32 on the negative-flag path that a zero operand takes.\n\n\tPR target/127117\n\ngcc/ChangeLog:\n\n\t* config/arc/arc.md (*arc_clzsi2): Produce 31 rather than 32 for\n\ta zero operand.\n\t(arc_ctzsi2): Likewise.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/arc/arc.exp (check_effective_target_norm): New.\n\t* gcc.target/arc/pr127117.c: New test.\n\nCo-authored-by: Luis Silva \u003cluis.silva@globalfoundries.com\u003e\nSigned-off-by: Michiel Derhaeg \u003cmichiel.derhaeg@globalfoundries.com\u003e\n"
    },
    {
      "commit": "189b0202e2664ea06e17c5424d2d17151607ee2d",
      "tree": "5d2eb51c31a4487f872b49441d72b828b0998a68",
      "parents": [
        "8a312e7a448a81d5447729c2743ec7b69b581402"
      ],
      "author": {
        "name": "Andrew MacLeod",
        "email": "amacleod@redhat.com",
        "time": "Tue Oct 06 10:05:59 2026 -0400"
      },
      "committer": {
        "name": "Andrew MacLeod",
        "email": "amacleod@redhat.com",
        "time": "Tue Oct 06 12:22:56 2026 -0400"
      },
      "message": "Check free list before using a relation.\n\nRather than calling reset_range_Info in release_ssa_name_fn, lazily\ncheck the free list when registering nearest relations to avoid returning\na relation with a released ssa-name.\n\n\tPR tree-optimization/127719\n\tgcc/\n\t* tree-ssanames.cc (release_ssa_name_fn): Do not call\n\treset_range_info.\n\t* value-relation.cc (dom_oracle::nearest_relations): Check the\n\tfree list before adding a name to the relation list.\n"
    },
    {
      "commit": "8a312e7a448a81d5447729c2743ec7b69b581402",
      "tree": "a247fbc18fd2d9c491483c4cd3d350c7fddfe878",
      "parents": [
        "4fc22cd1159e19a5b6830c8e3c70f7b1f44748fc"
      ],
      "author": {
        "name": "Kyrylo Tkachov",
        "email": "ktkachov@nvidia.com",
        "time": "Mon Oct 05 22:47:09 2026 +0200"
      },
      "committer": {
        "name": "Kyrylo Tkachov",
        "email": "ktkachov@nvidia.com",
        "time": "Tue Oct 06 15:25:36 2026 +0200"
      },
      "message": "genmatch: Relax DT_TRUE ordering barrier in decision_tree::find_node\n\nThe DT_TRUE merge barrier in find_node prevents a later pattern from\nmerging into an earlier equal sibling when a DT_TRUE node lies between\nthem.  The barrier was introduced for PR 64084 (r218141) to preserve\nsource order in cases where multiple patterns can match the same input.\n\nToday\u0027s match.pd is protected at a finer grain by the gen_kids flush:\nDT_TRUE and DT_MATCH kids each force a flush of collected alternatives\nbefore emitting their own subtrees.  The flush guarantees that patterns\nbefore a DT_TRUE are tried before patterns after it, so the barrier in\nfind_node is redundant for most cases.\n\nThe remaining cases where the barrier is necessary are those where an\nintermediate sibling (between the earlier and later equal nodes) has a\nDT_MATCH descendant.  A DT_MATCH descendant means the sibling\u0027s\nsubtree can match any input value, including inputs matched by the later\nnode\u0027s subtree.  If the later node merged into the earlier one, it would\nbe tried before the DT_MATCH sibling, violating source order for those\ninputs.\n\nWhen no intermediate sibling has a DT_MATCH descendant, every sibling\nmatches a disjoint set of inputs (since the top-level operand overlap\ncheck already ensures no sibling\u0027s top-level operation overlaps with\np\u0027s, and DT_MATCH is the only construct that can widen the match beyond\na specific operation).  In this case the merge is safe.\n\nReplace the unconditional DT_TRUE barrier refusal with a scan of the\nintermediate siblings: refuse only when at least one non-DT_TRUE sibling\nbetween the candidate and the insertion point has a DT_MATCH descendant.\nThis reduces the generated GIMPLE matcher by about 0.4% and the GENERIC\nmatcher by about 0.2%.\n\ngcc/ChangeLog:\n\n\t* genmatch.cc (subtree_has_match_p): New function.\n\t(decision_tree::find_node): Replace unconditional DT_TRUE barrier\n\twith a scan for DT_MATCH descendants in intermediate siblings.\n\nSigned-off-by: Kyrylo Tkachov \u003cktkachov@nvidia.com\u003e\n"
    },
    {
      "commit": "4fc22cd1159e19a5b6830c8e3c70f7b1f44748fc",
      "tree": "43b3860778e01a9b468551eb57f622530e1879e5",
      "parents": [
        "5f55b86f2737a046bb3d06cae52d1c96646b84fe"
      ],
      "author": {
        "name": "Kyrylo Tkachov",
        "email": "ktkachov@nvidia.com",
        "time": "Mon Oct 05 22:08:01 2026 +0200"
      },
      "committer": {
        "name": "Kyrylo Tkachov",
        "email": "ktkachov@nvidia.com",
        "time": "Tue Oct 06 15:24:53 2026 +0200"
      },
      "message": "genmatch: Relax overlap_node barrier for GIMPLE/GENERIC pairs\n\nnodes_overlap_p returns true for any two DT_OPERAND nodes whose\noperand cases overlap.  decision_tree::find_node uses this to set\noverlap_node, which prevents a later node from merging into an earlier\nequal sibling across the blocking node.\n\nOf the 163 barrier refusals on trunk, 135 (83%) are between the GIMPLE\nform and the GENERIC form that lower_cond gives every COND_EXPR\ncondition.  gen_kids_1 dispatches the GIMPLE form under the SSA_NAME\ncase and the GENERIC form by the operand\u0027s own TREE_CODE.  An input\ncannot satisfy both dispatch conditions simultaneously, so these 135\nrefusals protect no ordering-sensitive case.\n\nAdd a check in nodes_overlap_p: return false when the two expressions\ndiffer in is_generic.  This eliminates the spurious GIMPLE/GENERIC\noverlap refusals while keeping every DT_MATCH and overlapping\noperator-set refusal.  The 7 remaining order-sensitive pattern pairs\nall require degenerate inputs that other patterns fold first, and both\nof the patterns in each pair produce the same result value.\n\nOn aarch64 at ten GIMPLE parts, GIMPLE lines fall by about 0.6%.\nGENERIC output is unchanged.\n\nBootstrapped and tested on aarch64-none-linux-gnu.\nOk for trunk?\nThanks,\nKyrill\n\ngcc/ChangeLog:\n\n\t* genmatch.cc (nodes_overlap_p): Return false when the two\n\texpressions have different is_generic, as they cannot match the\n\tsame input.\n\nSigned-off-by: Kyrylo Tkachov \u003cktkachov@nvidia.com\u003e\n"
    },
    {
      "commit": "5f55b86f2737a046bb3d06cae52d1c96646b84fe",
      "tree": "f80509c814ce8fc358f6122ca7af9525bfbdad6b",
      "parents": [
        "93ea772554bde9264855704d9050bf065d018781"
      ],
      "author": {
        "name": "Kyrylo Tkachov",
        "email": "ktkachov@nvidia.com",
        "time": "Mon Oct 05 22:46:52 2026 +0200"
      },
      "committer": {
        "name": "Kyrylo Tkachov",
        "email": "ktkachov@nvidia.com",
        "time": "Tue Oct 06 15:24:41 2026 +0200"
      },
      "message": "genmatch: Share transform copies for non-delayable for-iterators\n\nWhen can_delay_subst is false, lower_for substitutes the for-iterator\ninto both the match and the result for each operator in the list.  If\nthe result does not reference the iterator, replace_id still produces a\nfresh deep copy, so every iteration holds a distinct result pointer even\nthough the result trees are structurally identical.  The code generator\nthen emits the transform inline once per operator, bloating the output.\n\nThe existing sharing mechanism (compare_op, sinfo) already shares a\ntransform across operators when can_delay_subst is true, detecting\nidentical results by pointer equality.  The same mechanism works for the\nnon-delayable case when the result pointer is not replaced.\n\nGuard the replace_id call on the result with contains_id: skip the copy\nwhen the iterator does not appear in the result.  All iterations then\nkeep result_op pointing to the original s-\u003eresult, compare_op returns\ntrue for them, and the code generator outlines the transform once.\n\nThe main beneficiary is match.pd:3732 (combine_comparisons).  Since\nc7ebd58535a and bbc2517fe41 (2026-08-11), its outer (for bitop ...) list\nmixes tcc_binary and tcc_comparison codes, blocking delayed substitution.\nThe result does not reference bitop, so without this fix every one of\nthe 1764 worklist entries gets its own result copy and its own\ngimple_simplify_N function.  This patch reduces the generated GIMPLE\nmatcher by about 1.2% and the GENERIC matcher by about 1.2%.\n\nAlso fix contains_id for c_expr: the previous code checked capture_ids,\nwhich only tracks @N-style captures, so it always returned false for\nfor-iterator names.  Replace it with a scan of the CPP_NAME tokens in\nthe inline C code, matching the lookup gen_transform performs at\ncode-generation time.\n\nBootstrapped and tested on aarch64-none-linux-gnu.\nOk for trunk?\nThanks,\nKyrill\n\ngcc/ChangeLog:\n\n\t* genmatch.cc (contains_id): For c_expr, check CPP_NAME tokens\n\trather than capture_ids to detect for-iterator references.\n\t(lower_for): Skip result copy in replace_id when the for-iterator\n\tdoes not appear in the result, to preserve pointer identity and\n\tenable transform sharing.\n\nSigned-off-by: Kyrylo Tkachov \u003cktkachov@nvidia.com\u003e\n"
    },
    {
      "commit": "93ea772554bde9264855704d9050bf065d018781",
      "tree": "fa407a4d3f9588e9d50fc0dfc035096db7dfeb98",
      "parents": [
        "ebca7252ebc47cf6daab41c5ca1ea7e858302fbe"
      ],
      "author": {
        "name": "Kyrylo Tkachov",
        "email": "ktkachov@nvidia.com",
        "time": "Fri Oct 02 14:03:30 2026 +0200"
      },
      "committer": {
        "name": "Kyrylo Tkachov",
        "email": "ktkachov@nvidia.com",
        "time": "Tue Oct 06 15:24:30 2026 +0200"
      },
      "message": "genmatch: Try later patterns when a transform needs a sequence\n\nWhen a GIMPLE transform substitutes a capture that matched a COND_EXPR\ncondition anywhere other than a COND_EXPR condition, the generated code\nbuilds the comparison as a statement of its own, and gives up if there is no\nsequence to build it in.  It gives up with \"return false\", which leaves the\nwhole function.  For a transform that genmatch emits inline in a matcher,\nthat skips every later pattern as well.  For a transform that several\ndecision-tree leaves share, which genmatch moves into a function of its own,\nit skips only that pattern.\n\nJump to the failure label of the pattern instead, as the other transform\nfailures already do, so that matching goes on with the next pattern:\n\n  _o2[0] \u003d captures[0];\n  if (COMPARISON_CLASS_P (_o2[0]))\n    {\n      if (!seq) return false;               \u003c- before\n      if (!seq) goto next_after_fail1364;   \u003c- after\n      _o2[0] \u003d gimple_build (seq, TREE_CODE (_o2[0]), ...);\n    }\n\nIn the generated GIMPLE code 27 lines change and no others.  Three of them\nare in functions that hold a single transform, where the two forms are\nequivalent.  The GENERIC code does not change.  With several output files\nsome functions land in a different file, because the changed lines are\nlonger and genmatch fills the shortest file first.\n\nBootstrapped and regression tested on aarch64-linux-gnu.\nOk for trunk?\nThanks,\nKyrill\n\ngcc/ChangeLog:\n\n\t* genmatch.cc (capture::gen_transform): Jump to the failure label\n\trather than return when a comparison needs a sequence and there is\n\tnone.\n\nSigned-off-by: Kyrylo Tkachov \u003cktkachov@nvidia.com\u003e\n"
    },
    {
      "commit": "ebca7252ebc47cf6daab41c5ca1ea7e858302fbe",
      "tree": "fc237efa32028c594afc43b467289512f94efd99",
      "parents": [
        "9514a728a62cb82fd05b2db97717525e98ebdd53"
      ],
      "author": {
        "name": "Jonathan Wakely",
        "email": "jwakely@redhat.com",
        "time": "Tue Oct 06 13:40:11 2026 +0100"
      },
      "committer": {
        "name": "Jonathan Wakely",
        "email": "redi@gcc.gnu.org",
        "time": "Tue Oct 06 13:40:11 2026 +0100"
      },
      "message": "libstdc++: Rename _M_is_leap_second to _M_60th_second in chrono::parse\n\nThe _M_is_leap_second flag doesn\u0027t actually mean the time is a leap\nsecond, additional checks are needed to confirm that. It really just\nmeans that we parsed \"60\" or something like \"60.123\" for the seconds\nfield. How the caller interprets that depends on the caller.\n\nRename it to _M_60th_second which is more accurate and avoids implying\nthat the parsed time is definitely a leap second.\n\nlibstdc++-v3/ChangeLog:\n\n\t* include/bits/chrono_io.h (_Parser::_M_is_leap_second): Rename\n\tto _M_60th_second.\n"
    },
    {
      "commit": "9514a728a62cb82fd05b2db97717525e98ebdd53",
      "tree": "eb52f8c9596c9fac92ef4830f80cc2fcf4e99c7c",
      "parents": [
        "3d1c848cd57e9c991b5e670fdc11d819cf999b5b"
      ],
      "author": {
        "name": "Richard Biener",
        "email": "rguenther@suse.de",
        "time": "Tue Oct 06 10:42:02 2026 +0200"
      },
      "committer": {
        "name": "Richard Biener",
        "email": "rguenth@gcc.gnu.org",
        "time": "Tue Oct 06 14:20:10 2026 +0200"
      },
      "message": "tree-optimization/127705 - access violation with SCC copy\n\nThe following fixes up the completely botched attempt to save off\nthe SCC for later setting of the scheduling result to all components.\n\n\tPR tree-optimization/127705\n\t* tree-vect-slp.cc (vect_schedule_scc): Fixup SCC copy.\n"
    },
    {
      "commit": "3d1c848cd57e9c991b5e670fdc11d819cf999b5b",
      "tree": "3dcdb79dffb43e0acda7943afa3fba86d740b71e",
      "parents": [
        "5358d5891fac4ebe63ba7f4a684a6be6f889300b"
      ],
      "author": {
        "name": "Jonathan Wakely",
        "email": "jwakely@redhat.com",
        "time": "Mon Aug 03 19:23:51 2026 +0100"
      },
      "committer": {
        "name": "Jonathan Wakely",
        "email": "redi@gcc.gnu.org",
        "time": "Tue Oct 06 12:28:55 2026 +0100"
      },
      "message": "libstdc++: Make chrono::parse support valid leap seconds [PR126543]\n\nFormatting utc_time can produce a time ending with \":60\" for a leap\nsecond, so we should also be able to read that back using chrono::parse.\n\nWe should reject \":60\" unless the time really is a leap second, so check\nthat the full time was 23:59:60 and do a lookup in the list of known\nleap seconds. Continue to reject \":60\" for time points except utc_time.\n\nlibstdc++-v3/ChangeLog:\n\n\tPR libstdc++/126543\n\t* include/bits/chrono_io.h (from_stream(..., utc_time\u0026, ...)):\n\tUse chrono::get_leap_second_info to check for valid leap\n\tseconds.\n\t(_Parser::operator()) \u003cR\u003e: Do not accept \"60\" for minutes.\n\t\u003cS\u003e: Accept \"60\" for seconds.\n\t* testsuite/std/time/parse/114279.cc: Use a real leap second as\n\tthe test input. Check parsing whole seconds as well as\n\tfractional seconds.\n\t* testsuite/std/time/parse/126543.cc: New test.\n\nReviewed-by: Tomasz Kamiński \u003ctkaminsk@redhat.com\u003e\n"
    },
    {
      "commit": "5358d5891fac4ebe63ba7f4a684a6be6f889300b",
      "tree": "ab296da4a11ce8aa5c7a223b2709a51d645f480c",
      "parents": [
        "c464028a7c0d57f655d9f83cb38eded52e5ee4b5"
      ],
      "author": {
        "name": "Eric Botcazou",
        "email": "ebotcazou@adacore.com",
        "time": "Tue Oct 06 13:01:33 2026 +0200"
      },
      "committer": {
        "name": "Eric Botcazou",
        "email": "ebotcazou@adacore.com",
        "time": "Tue Oct 06 13:03:44 2026 +0200"
      },
      "message": "Small cleanup in update_addresses_taken pass\n\nThe main part is to move, privatize and rename gimple_ior_addresses_taken \u0026\ngimple_ior_addresses_taken_1 from gimple.cc.  This in turn makes it possible\nto call the latter for the processing of PHI nodes instead of duplicating\nthe internal logic.\n\ngcc/\n\t* gimple.h (gimple_ior_addresses_taken): Delete.\n\t* gimple.cc (gimple_ior_addresses_taken_1): Move to...\n\t(gimple_ior_addresses_taken): Move to...\n\t* tree-ssa.cc (gimple_ior_addresses_taken_1): ...here and rename\n\tinto set_addresses_taken_1.\n\t(gimple_ior_addresses_taken): ...here, swap the parameters and\n\trename into set_addresses_taken.\n\t(execute_update_addresses_taken): Adjust to above changes and\n\tcall set_addresses_taken_1 for the processing of PHI nodes.\n"
    },
    {
      "commit": "c464028a7c0d57f655d9f83cb38eded52e5ee4b5",
      "tree": "6801f6b0e3e824cbacb44af0e77e927ba67fd5dd",
      "parents": [
        "574921e7ac2058d3baed5f193b33280d072cf39d"
      ],
      "author": {
        "name": "Oleg Tolmatcev",
        "email": "oleg.tolmatcev@gmail.com",
        "time": "Wed Sep 30 19:46:02 2026 +0200"
      },
      "committer": {
        "name": "Jonathan Yong",
        "email": "10walls@gmail.com",
        "time": "Tue Oct 06 10:50:40 2026 +0000"
      },
      "message": "i386: Fix va_arg of 256/512-bit vectors from a SysV va_list\n\nA SysV caller passes unnamed 256 and 512-bit vectors on the stack.\nFor a SysV va_list, ix86_gimplify_va_arg only reads them from the stack\nif the function containing the va_arg uses the SysV ABI; in an MS ABI\nfunction it reads them from the register save area instead.  Always\nread them from the stack.\n\nva-arg-abi-attribute-2.c passes on x86_64-w64-mingw32.\n\ngcc/ChangeLog:\n\n\t* config/i386/i386.cc (ix86_gimplify_va_arg): Always read unnamed\n\t256 and 512-bit vectors from the stack.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/i386/va-arg-abi-attribute-2.c: New test.\n\t* gcc.target/i386/va-arg-abi-attribute-3.c: New test.\n\nSigned-off-by: Oleg Tolmatcev \u003coleg.tolmatcev@gmail.com\u003e\nSigned-off-by: Jonathan Yong \u003c10walls@gmail.com\u003e\n"
    },
    {
      "commit": "574921e7ac2058d3baed5f193b33280d072cf39d",
      "tree": "5912fd603194557678dbe2b3b5ab342e1c0c93f7",
      "parents": [
        "7db40905669ff65ce1633ca5d093f50702affe56"
      ],
      "author": {
        "name": "Oleg Tolmatcev",
        "email": "oleg.tolmatcev@gmail.com",
        "time": "Thu Oct 01 00:45:24 2026 +0200"
      },
      "committer": {
        "name": "Jonathan Yong",
        "email": "10walls@gmail.com",
        "time": "Tue Oct 06 10:50:39 2026 +0000"
      },
      "message": "i386: Take the va_arg by-reference decision from the va_list type\n\nFor an MS ABI va_list, ix86_gimplify_va_arg calls\nstd_gimplify_va_arg_expr, which asks the pass_by_reference hook whether\nthe argument was passed by reference.  Without cumulative args, the hook\nassumes the default ABI, SysV on Linux, so va_arg reads an argument\npassed by reference as if it were passed by value.\n\nSplit the ABI-specific decision out of ix86_pass_by_reference.  For an\nindirect MS ABI argument, follow ia64_gimplify_va_arg: use the standard\nva_arg helper to read its pointer and then dereference it.  Use the\nexplicit SysV ABI for a SysV va_list so the opposite target-default\nmismatch is handled as well.\n\ngcc/ChangeLog:\n\n\t* config/i386/i386.cc (ix86_pass_by_reference_abi): New function,\n\tsplit out of ...\n\t(ix86_pass_by_reference): ... this.\n\t(ix86_gimplify_va_arg): Derive argument indirection from the ABI of\n\tthe va_list type.  Read indirect MS ABI arguments as pointers.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/i386/va-arg-abi-attribute.c: New test.\n\nSigned-off-by: Oleg Tolmatcev \u003coleg.tolmatcev@gmail.com\u003e\nSigned-off-by: Jonathan Yong \u003c10walls@gmail.com\u003e\n"
    },
    {
      "commit": "7db40905669ff65ce1633ca5d093f50702affe56",
      "tree": "49d4b42e1a3b644057f2a0aec2b14be897da24db",
      "parents": [
        "66289da380b8b79a08e02f094c2afa809e837199"
      ],
      "author": {
        "name": "Max Filippov",
        "email": "jcmvbkbc@gmail.com",
        "time": "Sun Oct 04 08:40:21 2026 -0700"
      },
      "committer": {
        "name": "Max Filippov",
        "email": "jcmvbkbc@gmail.com",
        "time": "Tue Oct 06 03:44:57 2026 -0700"
      },
      "message": "xtensa: fix ICE when building libgcc with -mauto-litpools\n\nThe commit r17-3780-ga5da203dd959 introduced a regression that results\nin the following kind of ICE when DF mode value 0 is loaded into AR\nregisters:\n\ngcc/libgcc/libgcc2.c:2746:1: error: unrecognizable insn:\n(insn 1401 775 1402 79 (set (reg:SF 12 a12)\n        (const_int 0 [0])) \"gcc/libgcc/libgcc2.c\":2719:8 -1\n     (nil))\nduring RTL pass: split2\n\nThis happens because the condition in the `move_fp_operand` that allows\nmatching 0 as a constant for auto litpool has been changed from\n`CONSTANT_P` to `CONST_DOUBLE_P`, but the code that splits DF mode\nconstant 0 produces const_int.\n\ngcc/\n\t* config/xtensa/predicates.md (move_fp_operand): Use CONSTANT_P\n\tinstead of CONST_DOUBLE_P.\n"
    },
    {
      "commit": "66289da380b8b79a08e02f094c2afa809e837199",
      "tree": "da57247a6317d431dd84b91535a1ffa68ea4e273",
      "parents": [
        "11a9bf984b1a9824f6f1d7e522af23836a9f1419"
      ],
      "author": {
        "name": "Jeevitha",
        "email": "jeevitha@linux.ibm.com",
        "time": "Tue Oct 06 03:45:15 2026 -0500"
      },
      "committer": {
        "name": "Jeevitha",
        "email": "jeevitha@linux.ibm.com",
        "time": "Tue Oct 06 04:36:12 2026 -0500"
      },
      "message": "testsuite: Fix vec-shift-double-runnable.c for Power10BE [PR127548]\n\nThe expected values in vec-shift-double-runnable.c assume\nlittle-endian representation. The vec_sldb and vec_srdb built-ins\nhave endian-dependent results because the vector operands are\nconcatenated in big-endian order.\n\nAdd big-endian expected values for the vec_sldb and vec_srdb tests\nso that the testcase also passes on big-endian.\n\n2026-10-06  Jeevitha Palanisamy  \u003cjeevitha@linux.ibm.com\u003e\n\ngcc/testsuite/\n\tPR target/127548\n\t* gcc.target/powerpc/vec-shift-double-runnable.c: Add\n\tbig-endian expected values for vec_sldb and vec_srdb tests.\n"
    },
    {
      "commit": "11a9bf984b1a9824f6f1d7e522af23836a9f1419",
      "tree": "0d4e5b50423e0d3b4fcfd46e8b068d459baf7fa5",
      "parents": [
        "028b8b62979f7e6326cb15ec8e519b1600e86a36"
      ],
      "author": {
        "name": "Tamar Christina",
        "email": "tamar.christina@arm.com",
        "time": "Tue Oct 06 10:06:40 2026 +0100"
      },
      "committer": {
        "name": "Tamar Christina",
        "email": "tamar.christina@arm.com",
        "time": "Tue Oct 06 10:08:08 2026 +0100"
      },
      "message": "AArch64: Fix PCH PIE builds by using anchor [PR126063]\n\nThe fix for PR123457 to fix PCH was only partial.  While it added the table\npointers to GTY so they\u0027re tracked as roots, it didn\u0027t fix the pointers of the\nnested classes that are used as hashes for the object.\n\nThis leads to the PCH tests all still crashing when the toolchain is configured\nwith -PIE.\n\nThere are three pointers being used in function_instance::hash ()\n\nconst char *base_name;\nconst function_base *base;\nconst function_shape *shape;\n\nThese points when PIE and PCH will be loaded into different offsets by each\ninvocation of the compiler sharing the same PCH file since these pointer point\ninto the compiler\u0027s executable and are no objects allocated by GGC.\n\nThe documentation states that GTY((callback)) can only be used for function\npointers so can\u0027t be used for data pointers.  The base class is marked\nGTY((user)) anyway.  The easiest fix is dropping the pointers from the\ncalculation of the hash, however this weakens the hash function.\n\nInstead this patch registers the pointers with the walkers through\ngt_pch_note_callback and then instead of using the pointers in the hash it uses\nthe stable ptr diff between an anchor and the pointer.\n\nThe idea is that as the executable gets loaded into different addresses, since\nPCH enforced that it must be the exact same version of the binary that the\noffsets are constant.  So by storing the ptr - offset we get a stable \"hash\" ID.\n\nThe anchor here is chosen to be the function_table itself which is being\nrelocated by PCH.\n\ngcc/ChangeLog:\n\n\tPR target/126063\n\t* config/aarch64/aarch64-acle-builtins.cc (function_instance::hash):\n\tUse ptr diff for hash instead of ptr.\n\t(gt_pch_nx): Add the pointers to PCH tracking.\n"
    },
    {
      "commit": "028b8b62979f7e6326cb15ec8e519b1600e86a36",
      "tree": "01772535bd733da1893b06b47eb3813d439131a6",
      "parents": [
        "8b90726a28bb63038b4f80242c7f5af7f53b60ff"
      ],
      "author": {
        "name": "Kyrylo Tkachov",
        "email": "ktkachov@nvidia.com",
        "time": "Fri Sep 11 16:31:01 2026 +0200"
      },
      "committer": {
        "name": "Kyrylo Tkachov",
        "email": "ktkachov@nvidia.com",
        "time": "Tue Oct 06 10:15:46 2026 +0200"
      },
      "message": "cfgcleanup: keep tail merging out of an unfactored computed goto [PR127246]\n\nbbcb0c056be (PR15242) stopped try_crossjump_bb from sharing the tails of\nthe predecessors of a computed jump unless optimizing for size.\npass_duplicate_computed_gotos copies the jump back into each predecessor\nand a shared tail defeats that.  efd8f7507b3 replaced !optimize_size with\noptimize_bb_for_size_p (bb), which inverted the test: tails are now shared\nin code optimized for speed and kept apart in code optimized for size.\n\nTest the condition of the gate of pass_duplicate_computed_gotos instead,\n!optimize_function_for_size_p (cfun) \u0026\u0026 flag_expensive_optimizations.\nPR42621 fixed the bb-reorder half of the same change in that gate.  As\nin bbcb0c056be, the guard then applies to the whole function, also to a\nblock that is too large to be unfactored.  try_head_merge_bb has a copy\nof the inverted test that cannot change code, because every successor\nedge of a computed jump is abnormal.  It stays as it is.\n\nOn the PR127246 testcase with identical handler tails and\n-fno-tree-slp-vectorize, jump2 no longer crossjumps the handlers at -O2\nonly for compgotos to copy the tails back.  With BB SLP the handlers jump\nto a block of vector copies in front of the dispatch, which is a separate\nproblem of the PR.  At -Os the handler tails are shared again, which makes\nthe aarch64 code of the PR testcase 54% smaller.  With\n-fno-expensive-optimizations, which disables the duplication, the tails\nare shared as well.\n\nBootstrapped and regression tested on aarch64-unknown-linux-gnu and\nx86_64-pc-linux-gnu.\n\ngcc/ChangeLog:\n\n\tPR rtl-optimization/127246\n\t* cfgcleanup.cc (try_crossjump_bb): Keep the predecessors of a\n\tcomputed jump apart under the condition of the gate of\n\tpass_duplicate_computed_gotos.\n\ngcc/testsuite/ChangeLog:\n\n\tPR rtl-optimization/127246\n\t* gcc.dg/pr127246-1.c: New test.\n\t* gcc.dg/pr127246-2.c: New test.\n\t* gcc.dg/pr127246-3.c: New test.\n\nSigned-off-by: Kyrylo Tkachov \u003cktkachov@nvidia.com\u003e\n"
    },
    {
      "commit": "8b90726a28bb63038b4f80242c7f5af7f53b60ff",
      "tree": "b15675238bd395967551e6fc9fb4fd77b0c96701",
      "parents": [
        "35b4c01575e15550b49c82fe146b2669db6320a7"
      ],
      "author": {
        "name": "Richard Biener",
        "email": "rguenther@suse.de",
        "time": "Mon Sep 28 15:44:56 2026 +0200"
      },
      "committer": {
        "name": "Richard Biener",
        "email": "rguenth@gcc.gnu.org",
        "time": "Tue Oct 06 09:49:52 2026 +0200"
      },
      "message": "Preserve comparison operand order whem if-combining\n\nWhen combining conditions ifcombine_ifandif passes inner_cond_code as the\nfirst comparison and outer_cond_code as the second to\nmaybe_fold_and_comparisons and maybe_fold_and_comparisons calls\nand_comparisons_1 with both comparison orders.  Both defeats preserving\nIEEE exceptions of trapping outer comparisons which combine_comparisons\nhandles, but only when the order of the comparisons is preserved correctly.\n\nThis disables some optimization in and_comparisons_1 which only looks\nthrough SSA defs for the first comparison.  This requires larger\nrefactoring and the overall design seems dubious with recursions\ngoing in ways that with the swapping look exponential.\n\n\tPR tree-optimization/53805\n\t* tree-ssa-ifcombine.cc (ifcombine_ifandif): Pass comparisons\n\tin the correct order.\n\t* gimple-fold.cc (and_comparisons_1): Add FIXME comment.\n\t(maybe_fold_and_comparisons): Do not call and_comparisons_1 with\n\tswapped comparisons.\n\n\t* gcc.dg/tree-ssa/fp-trapping-cmp-6.c: New testcase\n\t* gcc.dg/tree-ssa/fp-trapping-cmp-7.c: Likewise.\n"
    },
    {
      "commit": "35b4c01575e15550b49c82fe146b2669db6320a7",
      "tree": "fe28f65fa063a57f42c82448a00faa36cb6a6ed5",
      "parents": [
        "f5f265263dc9faf5cecbe67f15eb7f5c4f85f7d4"
      ],
      "author": {
        "name": "Richard Biener",
        "email": "rguenther@suse.de",
        "time": "Mon Sep 28 15:44:47 2026 +0200"
      },
      "committer": {
        "name": "Richard Biener",
        "email": "rguenth@gcc.gnu.org",
        "time": "Tue Oct 06 09:49:51 2026 +0200"
      },
      "message": "Do not treat COMPCODE_FALSE or COMPCODE_TRUE as trapping in combine_comparisons\n\nIn combine_comparisons, under flag_trapping_math, we check whether the combined\ncomparison traps under the same conditions as the input comparisons:\n\n  bool trap \u003d (compcode \u0026 COMPCODE_UNORD) \u003d\u003d 0\n              \u0026\u0026 (compcode !\u003d COMPCODE_EQ)\n              \u0026\u0026 (compcode !\u003d COMPCODE_ORD);\n\nWhen compcode is COMPCODE_FALSE or COMPCODE_TRUE trap is computed as true,\nand combine_comparisons errorneously eliminates IEEE exceptions.\n\n\tPR tree-optimization/53805\n\t* fold-const.cc (combine_comparisons): Do not treat COMPCODE_FALSE\n\tor COMPCODE_TRUE as trapping.\n\n\t* gcc.dg/tree-ssa/fp-trapping-and-1.c: New testcase.\n"
    },
    {
      "commit": "f5f265263dc9faf5cecbe67f15eb7f5c4f85f7d4",
      "tree": "b9835f554e14cd424393815ad80432b142ad0e78",
      "parents": [
        "82787e703f9782b113d0ddf6944b50814986205f"
      ],
      "author": {
        "name": "Jakub Jelinek",
        "email": "jakub@redhat.com",
        "time": "Tue Oct 06 08:53:05 2026 +0200"
      },
      "committer": {
        "name": "Jakub Jelinek",
        "email": "jakub@gcc.gnu.org",
        "time": "Tue Oct 06 08:53:05 2026 +0200"
      },
      "message": "i386: Extend _Float16 to double using F16C/AVX512VL extension to float and then ss2sd [PR127720]\n\nFor AVX512FP16 we have an instruction for direct extension from _Float16\nto _Float64.  Without that ISA, we\u0027ve been emitting a libgcc API call,\nbut for F16C or AVX512VL we can do better, we can emit vcvtph2ps\nfollowed by vcvtss2sd, _Float32 is a superset of all _Float16\nvalues and _Float64 is superset of all _Float32 values, so the only\nchanges/exceptions we want are for sNaN input and vcvtph2ps should\nhandle that already.\n\n2026-10-06  Jakub Jelinek  \u003cjakub@redhat.com\u003e\n\n\tPR target/127720\n\t* config/i386/i386.md (extendhfdf2): Enable also for\n\tTARGET_F16C || TARGET_AVX512VL, in those cases expand as\n\textendhfsf2 followed by extendsfdf2.\n\n\t* gcc.target/i386/pr127720-f16c.c: New test.\n\t* gcc.target/i386/pr127720-avx512vl.c: New test.\n\nReviewed-by: Uros Bizjak \u003cubizjak@gmail.com\u003e\n"
    },
    {
      "commit": "82787e703f9782b113d0ddf6944b50814986205f",
      "tree": "839d2753198b819faf1a3384a46797939fe33ac1",
      "parents": [
        "663f52c6ffcd885b9958da1c904be964669857d7"
      ],
      "author": {
        "name": "Richard Biener",
        "email": "rguenther@suse.de",
        "time": "Fri Sep 18 13:35:42 2026 +0200"
      },
      "committer": {
        "name": "Richard Biener",
        "email": "rguenth@gcc.gnu.org",
        "time": "Tue Oct 06 08:47:27 2026 +0200"
      },
      "message": "[x86][v2] umul\u003cmode\u003e3_highpart for VnDI\n\nThis implements umul\u003cmode\u003e3_highpart for V2DI, V4DI and V8DI using\nSSE2 instructions, specifically exercising pmuludq.  I wasn\u0027t able\nto produce a scalar vectorizer pattern open-coding a sequence that\nwould vectorize to this, specifically with the same VF and the\nsetup of the input to the pmuludq, so I opted for implementing\nthis in the target.\n\nI added a testcase for a V2DI loop that shouldn\u0027t be vectorized\nand one for a V4DI loop that should.\n\nThis speeds up 750.sealcrypto_r by ~20% on Zen4 and should recover what\nwas lost with r17-3437.\n\nv2:\n - merge the two function costing parts, use SImode multiplication cost,\n   VnDImode multiplication cost is not accurate for the SImode widening\n   multiplication we want to use\n - add similar costing to the MULT_HIGHPART_EXPR case\n - alternate multiplication sequence, squeezing out a few ops\n\n\tPR tree-optimization/127452\n\t* config/i386/i386-protos.h (ix86_expand_umulvndi_highpart): Declare.\n\t* config/i386/i386-expand.cc (ix86_expand_umulvndi_highpart):\n\tNew function.\n\t* config/i386/sse.md (umul\u003cmode\u003e3_highpart): Add for VI8_AVX2_AVX512F.\n\t* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): Cost\n\tIFN_MULH as we implement it.\n\n\t* gcc.target/i386/vect-umulv2di_high.c: New testcase.\n\t* gcc.target/i386/vect-umulv4di_high.c: Likewise.\n"
    },
    {
      "commit": "663f52c6ffcd885b9958da1c904be964669857d7",
      "tree": "c045d7eb6799e8706971659a79787ff31c0697b0",
      "parents": [
        "78392628c7691e875d581279336c452e17f2f109"
      ],
      "author": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Tue Aug 25 09:47:55 2026 +0000"
      },
      "committer": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Tue Oct 06 12:05:36 2026 +0530"
      },
      "message": "aarch64: Port NEON min/max intrinsics to the pragma-based framework\n\nPort the following intrinsics to the pragma-based framework:\n* vmax\n* vmin\n* vmaxnm\n* vminnm\n\nThe faminmax-no-codegen.c test now ends up folding to a single\ninstruction (famax / famin) in a few cases.\n\nThe following are not ported in this patch as they cannot be directly\nlowered from an IFN through an existing instruction pattern:\n* vmax_f16\n* vmax_f32\n* vmax_f64\n* vmaxq_f16\n* vmaxq_f32\n* vmaxq_f64\n* vmin_f16\n* vmin_f32\n* vmin_f64\n* vminq_f16\n* vminq_f32\n* vminq_f64\n\nThis is due to the NaN semantics of these intrinsics which require lowering to\n\u003coptab\u003e_nan variants.\n\nBootstrapped and regtested on aarch64-linux-gnu.\n\nSigned-off-by: Dhruv Chawla \u003cdhruvc@nvidia.com\u003e\n\ngcc/ChangeLog:\n\n\t* config/aarch64/aarch64-neon-builtins-base.cc (vmax, vmaxq, vmin,\n\tvminq, vmaxnm, vmaxnmq, vminnm, vminnmq): New function bases.\n\t* config/aarch64/aarch64-neon-builtins-base.def (vmax, vmaxq, vmin,\n\tvminq, vmaxnm, vmaxnmq, vminnm, vminnmq): New function groups.\n\t* config/aarch64/arm_neon.h (vmax_s8, vmax_s16, vmax_s32, vmax_u8,\n\tvmax_u16, vmax_u32, vmaxq_s8, vmaxq_s16, vmaxq_s32, vmaxq_u8,\n\tvmaxq_u16, vmaxq_u32, vmaxnm_f32, vmaxnm_f64, vmaxnmq_f32, vmaxnmq_f64,\n\tvmin_s8, vmin_s16, vmin_s32, vmin_u8, vmin_u16, vmin_u32, vminq_s8,\n\tvminq_s16, vminq_s32, vminq_u8, vminq_u16, vminq_u32, vminnm_f32,\n\tvminnm_f64, vminnmq_f32, vminnmq_f64, vmaxnm_f16, vmaxnmq_f16,\n\tvminnm_f16, vminnmq_f16): Delete functions.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/simd/faminmax-no-codegen.c: Update\n\tcheck-function-bodies checks.\n\t* gcc.target/aarch64/neon/vmax.c: New test.\n\t* gcc.target/aarch64/neon/vmaxnm.c: Likewise.\n\t* gcc.target/aarch64/neon/vmin.c: Likewise.\n\t* gcc.target/aarch64/neon/vminnm.c: Likewise.\n"
    },
    {
      "commit": "78392628c7691e875d581279336c452e17f2f109",
      "tree": "51a31642eb1ff2edeb4a90b93df8d5f74afef665",
      "parents": [
        "78ed779c28d1254e08b6c0a758bedfc8fcb1747c"
      ],
      "author": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Tue Aug 25 09:25:34 2026 +0000"
      },
      "committer": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Tue Oct 06 12:05:36 2026 +0530"
      },
      "message": "aarch64: Port NEON rounding intrinsics to the pragma-based framework\n\nPort the following intrinsics to the pragma-based framework:\n* vrnd\n* vrnda\n* vrndi\n* vrndm\n* vrndn\n* vrndns\n* vrndp\n* vrndx\n\nBootstrapped and regtested on aarch64-linux-gnu.\n\nSigned-off-by: Dhruv Chawla \u003cdhruvc@nvidia.com\u003e\n\ngcc/ChangeLog:\n\n\t* config/aarch64/aarch64-neon-builtins-base.cc (vrnd, vrndq, vrnda,\n\tvrndaq, vrndi, vrndiq, vrndm, vrndmq, vrndn, vrndns, vrndnq, vrndp,\n\tvrndpq, vrndx, vrndxq): New function bases.\n\t* config/aarch64/aarch64-neon-builtins-base.def (vrnd, vrndq, vrnda,\n\tvrndaq, vrndi, vrndiq, vrndm, vrndmq, vrndn, vrndns, vrndnq, vrndp,\n\tvrndpq, vrndx, vrndxq): New function groups.\n\t* config/aarch64/arm_neon.h (vrnd_f32, vrnd_f64, vrndq_f32, vrndq_f64,\n\tvrnda_f32, vrnda_f64, vrndaq_f32, vrndaq_f64, vrndi_f32, vrndi_f64,\n\tvrndiq_f32, vrndiq_f64, vrndm_f32, vrndm_f64, vrndmq_f32, vrndmq_f64,\n\tvrndns_f32, vrndn_f32, vrndn_f64, vrndnq_f32, vrndnq_f64, vrndp_f32,\n\tvrndp_f64, vrndpq_f32, vrndpq_f64, vrndx_f32,  vrndx_f64, vrndxq_f32,\n\tvrndxq_f64, vrnd_f16, vrndq_f16, vrnda_f16, vrndaq_f16, vrndi_f16,\n\tvrndiq_f16, vrndm_f16, vrndmq_f16, vrndn_f16, vrndnq_f16, vrndp_f16,\n\tvrndpq_f16, vrndx_f16, vrndxq_f16): Delete functions.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/neon/vrnd.c: New test.\n\t* gcc.target/aarch64/neon/vrnda.c: Likewise.\n\t* gcc.target/aarch64/neon/vrndi.c: Likewise.\n\t* gcc.target/aarch64/neon/vrndm.c: Likewise.\n\t* gcc.target/aarch64/neon/vrndn.c: Likewise.\n\t* gcc.target/aarch64/neon/vrndp.c: Likewise.\n\t* gcc.target/aarch64/neon/vrndx.c: Likewise.\n"
    },
    {
      "commit": "78ed779c28d1254e08b6c0a758bedfc8fcb1747c",
      "tree": "3c8834e87167197d207e4f274dc792d5fd1a3f11",
      "parents": [
        "b1ed5e88f55539db555b990a7a8e0f2ba00588e1"
      ],
      "author": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Tue Aug 25 08:50:53 2026 +0000"
      },
      "committer": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Tue Oct 06 12:05:36 2026 +0530"
      },
      "message": "aarch64: Port NEON square-root intrinsics to pragma-based framework\n\nPort the vsqrt set of intrinsics to the pragma-based framework.\n\nBootstrapped and regtested on aarch64-linux-gnu.\n\nSigned-off-by: Dhruv Chawla \u003cdhruvc@nvidia.com\u003e\n\ngcc/ChangeLog:\n\n\t* config/aarch64/aarch64-neon-builtins-base.cc (vsqrt, vsqrtq):\n\tNew function bases.\n\t* config/aarch64/aarch64-neon-builtins-base.def (vsqrt, vsqrtq):\n\tNew function groups.\n\t* config/aarch64/arm_neon.h (vsqrt_f32, vsqrt_f64, vsqrtq_f32,\n\tvsqrtq_f64, vsqrt_f16, vsqrtq_f16): Delete functions.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/neon/vsqrt.c: New test.\n"
    },
    {
      "commit": "b1ed5e88f55539db555b990a7a8e0f2ba00588e1",
      "tree": "9a7e42a8700970b9838c1f4db51a1d74d9086481",
      "parents": [
        "9d42eeefb75065ab7c17926ae4f65bdfea6e8e77"
      ],
      "author": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Tue Aug 25 06:16:24 2026 +0000"
      },
      "committer": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Tue Oct 06 12:05:36 2026 +0530"
      },
      "message": "aarch64: Port NEON halving-add intrinsics to pragma-based framework\n\nPort the following intrinsics to the pragma-based framework:\n* vhadd\n* vrhadd\n\nThe arm_neon_{1,2,3}.c test cases now expect the ACLE streaming-mode diagnostic\ninstead of an inlining failure.\n\nThe inlining_10.c and inlining_11.c test cases are updated to use the\nvqtbl intrinsic instead of vhadd as the latter is no longer implemented\nas an always_inline function in arm_neon.h.\n\nBootstrapped and regtested on aarch64-linux-gnu.\n\nSigned-off-by: Dhruv Chawla \u003cdhruvc@nvidia.com\u003e\n\ngcc/ChangeLog:\n\n\t* config/aarch64/aarch64-neon-builtins-base.cc (vhadd, vhaddq, vrhadd,\n\tvrhaddq): New function bases.\n\t* config/aarch64/aarch64-neon-builtins-base.def (vhadd, vhaddq, vrhadd,\n\tvrhaddq): New function groups.\n\t* config/aarch64/arm_neon.h (vhadd_s8, vhadd_s16, vhadd_s32, vhadd_u8,\n\tvhadd_u16, vhadd_u32, vhaddq_s8, vhaddq_s16, vhaddq_s32, vhaddq_u8,\n\tvhaddq_u16, vhaddq_u32, vrhadd_s8, vrhadd_s16, vrhadd_s32, vrhadd_u8,\n\tvrhadd_u16, vrhadd_u32, vrhaddq_s8, vrhaddq_s16, vrhaddq_s32,\n\tvrhaddq_u8, vrhaddq_u16, vrhaddq_u32): Delete functions.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/sme/arm_neon_1.c: Update the expected\n\tdg-error message.\n\t* gcc.target/aarch64/sme/arm_neon_2.c: Likewise.\n\t* gcc.target/aarch64/sme/arm_neon_3.c: Likewise.\n\t* gcc.target/aarch64/sme/inlining_10.c: Replace vhadd with vqtbl\n\tas vhadd is no longer always_inline.\n\t* gcc.target/aarch64/sme/inlining_11.c: Likewise.\n\t* gcc.target/aarch64/neon/vhadd.c: New test.\n\t* gcc.target/aarch64/neon/vrhadd.c: Likewise.\n"
    },
    {
      "commit": "9d42eeefb75065ab7c17926ae4f65bdfea6e8e77",
      "tree": "8a52051161b992a278aa30b96241ef2ef7306744",
      "parents": [
        "4cb381957ca6240956cf07bcc8d53b9dfe125b13"
      ],
      "author": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Mon Aug 24 13:50:21 2026 +0000"
      },
      "committer": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Tue Oct 06 12:05:36 2026 +0530"
      },
      "message": "aarch64: Port NEON reduction intrinsics to pragma-based framework\n\nPort the following intrinsics to the pragma-based framework:\n* vaddv\n* vmaxv\n* vminv\n* vmaxnmv\n* vminnmv\n\nThe following are not ported in this patch as they cannot be directly\nlowered from an IFN through an existing instruction pattern:\n* vmaxv_f16\n* vmaxv_f32\n* vmaxvq_f16\n* vmaxvq_f32\n* vmaxvq_f64\n* vminv_f16\n* vminv_f32\n* vminvq_f16\n* vminvq_f32\n* vminvq_f64\n\nThis is due to the NaN semantics of these intrinsics which require\nmapping to \u003coptab\u003e_nan variants.\n\nBootstrapped and regtested on aarch64-linux-gnu.\n\nSigned-off-by: Dhruv Chawla \u003cdhruvc@nvidia.com\u003e\n\ngcc/ChangeLog:\n\n\t* config/aarch64/aarch64-acle-builtins.h (TYPES_s_float_bhs_integer,\n\tTYPES_sd_float_all_integer, s_float_bhs_integer,\n\tsd_float_all_integer): New type lists.\n\t* config/aarch64/aarch64-neon-builtins-base.cc (vaddv, vaddvq, vmaxv,\n\tvmaxvq, vminv, vminvq, vmaxnmv, vmaxnmvq, vminnmv, vminnmvq):\n\tNew function bases.\n\t* config/aarch64/aarch64-neon-builtins-base.def (vaddv, vaddvq, vmaxv,\n\tvmaxvq, vminv, vminvq, vmaxnmv, vmaxnmvq, vminnmv, vminnmvq):\n\tNew function groups.\n\t* config/aarch64/arm_neon.h (vaddv_s8, vaddv_s16, vaddv_s32, vaddv_u8,\n\tvaddv_u16, vaddv_u32, vaddvq_s8, vaddvq_s16, vaddvq_s32, vaddvq_s64,\n\tvaddvq_u8, vaddvq_u16, vaddvq_u32, vaddvq_u64, vaddv_f32, vaddvq_f32,\n\tvaddvq_f64, vmaxv_s8, vmaxv_s16, vmaxv_s32, vmaxv_u8, vmaxv_u16,\n\tvmaxv_u32, vmaxvq_s8, vmaxvq_s16, vmaxvq_s32, vmaxvq_u8, vmaxvq_u16,\n\tvmaxvq_u32, vmaxnmv_f32, vmaxnmvq_f32, vmaxnmvq_f64, vminv_s8,\n\tvminv_s16, vminv_s32, vminv_u8, vminv_u16, vminv_u32, vminvq_s8,\n\tvminvq_s16, vminvq_s32, vminvq_u8, vminvq_u16, vminvq_u32, vminnmv_f32,\n\tvminnmvq_f32, vminnmvq_f64, vmaxnmv_f16, vmaxnmvq_f16, vminnmv_f16,\n\tvminnmvq_f16): Delete functions.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/neon/vaddv.c: New test.\n\t* gcc.target/aarch64/neon/vmaxnmv.c: New test.\n\t* gcc.target/aarch64/neon/vmaxv.c: New test.\n\t* gcc.target/aarch64/neon/vminnmv.c: New test.\n\t* gcc.target/aarch64/neon/vminv.c: New test.\n"
    },
    {
      "commit": "4cb381957ca6240956cf07bcc8d53b9dfe125b13",
      "tree": "15a4dc3fa9f9adf687729dc4e55b222475ddafc1",
      "parents": [
        "1de4393ddec6ce2980184f32b0fd428c54d82a20"
      ],
      "author": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Mon Aug 24 06:26:00 2026 +0000"
      },
      "committer": {
        "name": "Dhruv Chawla",
        "email": "dhruvc@nvidia.com",
        "time": "Tue Oct 06 12:05:36 2026 +0530"
      },
      "message": "aarch64: Port NEON saturating add/sub intrinsics to pragma-based framework\n\nPort the following intrinsics to the pragma-based framework:\n* vqadd\n* vqsub\n\nPlus their scalar variants: vq{add,sub}{b,h,s,d}.\n\nThis patch also modifies the gimple_ifn handler class to automatically\nconvert intrinsics for V1XX modes (like V1DI and V1DF) to and from XX\n(i.e. DI and DF) modes to reuse the existing scalar patterns. There\nis no impact on codegen quality. Note that this matches the existing\nbehaviour in arm_neon.h where the scalar intrinsics are used and cast back\nto the single-element vector mode.\n\nExisting machine patterns are not updated to support the V1XX modes as\nthey lack entries in the attributes used (like Vtype, Vetype, Vmtype et\nal.). They would also require special handling to emit the \u003cinsn\u003e Dm, Dn forms.\nWidening the iterators to add scalar modes ends up colliding with the existing\nscalar patterns.\n\nBootstrapped and regtested on aarch64-linux-gnu.\n\nSigned-off-by: Dhruv Chawla \u003cdhruvc@nvidia.com\u003e\n\ngcc/ChangeLog:\n\n\t* config/aarch64/aarch64-neon-builtins-base.cc (vqaddb, vqaddh,\n\tvqadds, vqaddd, vqadd, vqaddq, vqsubb, vqsubh, vqsubs, vqsubd, vqsub,\n\tvqsubq): New function bases.\n\t(one_element_vector_type_p): New function.\n\t(gimple_ifn::fold): Automatically convert arguments with\n\tsingle-element vector modes to the corresponding XX modes and back.\n\t* config/aarch64/aarch64-neon-builtins-base.def (vqaddb, vqaddh,\n\tvqadds, vqaddd, vqadd, vqaddq, vqsubb, vqsubh, vqsubs, vqsubd, vqsub,\n\tvqsubq): New function groups.\n\t* config/aarch64/arm_neon.h (vqadd_s8, vqadd_s16, vqadd_s32,\n\tvqadd_s64, vqadd_u8, vqadd_u16, vqadd_u32, vqadd_u64, vqaddq_s8,\n\tvqaddq_s16, vqaddq_s32, vqaddq_s64, vqaddq_u8, vqaddq_u16, vqaddq_u32,\n\tvqaddq_u64, vqsub_s8, vqsub_s16, vqsub_s32, vqsub_s64, vqsub_u8,\n\tvqsub_u16, vqsub_u32, vqsub_u64, vqsubq_s8, vqsubq_s16, vqsubq_s32,\n\tvqsubq_s64, vqsubq_u8, vqsubq_u16, vqsubq_u32, vqsubq_u64, vqaddb_s8,\n\tvqaddh_s16, vqadds_s32, vqaddd_s64, vqaddb_u8, vqaddh_u16, vqadds_u32,\n\tvqaddd_u64, vqsubb_s8, vqsubh_s16, vqsubs_s32, vqsubd_s64, vqsubb_u8,\n\tvqsubh_u16, vqsubs_u32, vqsubd_u64): Delete functions.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/neon/vqadd.c: New test.\n\t* gcc.target/aarch64/neon/vqsub.c: Likewise.\n"
    },
    {
      "commit": "1de4393ddec6ce2980184f32b0fd428c54d82a20",
      "tree": "5403fb3569342bcf702cf28c4641af1540bbb5f3",
      "parents": [
        "892f207ad8adfd33e3e54d478cbb37195a5f7058"
      ],
      "author": {
        "name": "Stefan Schulze Frielinghaus",
        "email": "stefansf@gcc.gnu.org",
        "time": "Tue Oct 06 08:10:44 2026 +0200"
      },
      "committer": {
        "name": "Stefan Schulze Frielinghaus",
        "email": "stefansf@gcc.gnu.org",
        "time": "Tue Oct 06 08:10:44 2026 +0200"
      },
      "message": "s390: Fix bswap:HI reg-reg splitter [PR127692]\n\nThe splitter could fire before register allocation for which the\nattached test ICEs.  There we end up for operands[1] with (subreg:HI\n(reg:HF 70) 0) for which simplify_gen_subreg tries to fold two subregs\ninto (subreg:SI (reg:HF 70) 0) which is invalid.  For an invalid\nsimplification NULL_RTX is returned which is just propagated and\ndereferenced later on leading to an ICE.\n\nThe splitter is supposed to fire only after register allocation once we\ndecided to go for the GPR alternative in bswaphi2.  This also solves the\ninitial problem since after RA we should only deal with hard registers\nand simplify_gen_subreg folds subregs of GPRs (additionally this solves\nthe problem of using a paradoxical subreg as a left-hand side operand).\nAs a safety net, still test for NULL_RTX which would lead to more\ndescriptive ICEs.\n\n\tPR target/127692\n\ngcc/ChangeLog:\n\n\t* config/s390/s390.md: Fix bswap:HI reg-reg splitter.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/s390/pr127692-1.c: New test.\n\nCo-authored-by: Jakub Jelinek \u003cjakub@redhat.com\u003e\n"
    },
    {
      "commit": "892f207ad8adfd33e3e54d478cbb37195a5f7058",
      "tree": "c572670b503ac17c85a13e2aed5b953340c08785",
      "parents": [
        "748199b3435594e1521480258897ea0b39cde910"
      ],
      "author": {
        "name": "Aldy Hernandez",
        "email": "aldy@quesejoda.com",
        "time": "Mon Oct 05 13:07:36 2026 +0000"
      },
      "committer": {
        "name": "Aldy Hernandez",
        "email": "aldy@quesejoda.com",
        "time": "Tue Oct 06 05:29:08 2026 +0000"
      },
      "message": "DOM: minor cleanups\n\nThe expr_hash_elt (tree) constructor has never been defined, and\ninitialize_expr_from_cond has no user outside of its own file.\n\nFixed and pushed as obvious.\n\ngcc/ChangeLog:\n\n\t* tree-ssa-scopedtables.h (expr_hash_elt::expr_hash_elt): Remove\n\tthe undefined tree overload.\n\t(initialize_expr_from_cond): Remove declaration.\n\t* tree-ssa-scopedtables.cc (initialize_expr_from_cond): Make\n\tstatic.\n"
    },
    {
      "commit": "748199b3435594e1521480258897ea0b39cde910",
      "tree": "8c95cef56a6ee0295db95ad713ed359506c8f44b",
      "parents": [
        "962723b046ae6406c0c457bfdb76318b3652673f"
      ],
      "author": {
        "name": "GCC Administrator",
        "email": "gccadmin@gcc.gnu.org",
        "time": "Tue Oct 06 00:16:39 2026 +0000"
      },
      "committer": {
        "name": "GCC Administrator",
        "email": "gccadmin@gcc.gnu.org",
        "time": "Tue Oct 06 00:16:39 2026 +0000"
      },
      "message": "Daily bump."
    },
    {
      "commit": "962723b046ae6406c0c457bfdb76318b3652673f",
      "tree": "59d66e6b0284622370b030bc89f4eb56f9c5f101",
      "parents": [
        "ce4b6019b8758b04a8733bc672adbbaa384c752a"
      ],
      "author": {
        "name": "Dominic P",
        "email": "gcc@gcc.dp11.uk",
        "time": "Fri Oct 02 19:10:50 2026 +0100"
      },
      "committer": {
        "name": "Dominic P",
        "email": "gcc@gcc.dp11.uk",
        "time": "Mon Oct 05 20:49:52 2026 +0100"
      },
      "message": "c: Do not keep excess precision for the result of ! [PR123370]\n\nbuild_unary_op strips an EXCESS_PRECISION_EXPR from its operand and wraps\nthe result in one again, but the result of ! is int.  So with _Float16\n(or float with x87 excess precision), !(x - y) kept the type of x - y:\nsizeof and _Generic saw _Float16, ?: ICEd in build_conditional_expr,\nand !(x - y) / 2 ICEd at expand.  Do not re-wrap the result of\nTRUTH_NOT_EXPR; the operand is still tested at its excess precision, as\nfor (x - y) \u003d\u003d 0.\n\nBootstrapped and regression tested on x86_64-pc-linux-gnu.  On\naarch64-linux-gnu (qemu, SVE VL128), regression tested dg.exp,\naarch64.exp and the SVE tests; the SVE tests also at VL2048.  Tested\ntogether with the two PR121105 patches and an earlier version of the\ntests; the final gcc.dg/pr123370.c was compiled and run on\naarch64-linux-gnu (qemu), gcc.target/i386/pr123370.c run on\nx86_64-pc-linux-gnu with -m32.\n\nAssisted-by: Claude Opus 5 (Anthropic)\n\n\tPR c/123370\n\ngcc/c/ChangeLog:\n\n\t* c-typeck.cc (build_unary_op) \u003ccase TRUTH_NOT_EXPR\u003e: Clear eptype.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.dg/pr123370.c: New test.\n\t* gcc.target/i386/pr123370.c: New test.\n\nSigned-off-by: Dominic P \u003cgcc@gcc.dp11.uk\u003e\n"
    },
    {
      "commit": "ce4b6019b8758b04a8733bc672adbbaa384c752a",
      "tree": "bb7f38d9b825b431418733328fba9a3af33affdf",
      "parents": [
        "2633f491aedadd71ac44f5294c0035a95a35bdfd"
      ],
      "author": {
        "name": "Andrew MacLeod",
        "email": "amacleod@redhat.com",
        "time": "Mon Oct 05 09:46:48 2026 -0400"
      },
      "committer": {
        "name": "Andrew MacLeod",
        "email": "amacleod@redhat.com",
        "time": "Mon Oct 05 15:05:07 2026 -0400"
      },
      "message": "Clear range info when freeing an ssa name.\n\nWhen an ssa name is being released, clear any current range info.  THis\nalso uncovered a bug in the def chains where clearing the def chain\nimmediately rebuilds it.  This is inadvisable when the name is being\nreleased!  It also wasn\u0027t clearing the import field.\n\n\tPR tree-optimization/127719\n\tgcc\n\t* gimple-range-gori.cc (range_def_chain::clear): Do not\n\trecalculate a def chain when it has just been cleared.\n\t* tree-ssanames.cc (release_ssa_name_fn): Clear range info.\n\n\tgcc/testsuite/\n\t* gcc.dg/pr127719.c: New.\n\t* g++.dg/pr127729.C: New.\n"
    },
    {
      "commit": "2633f491aedadd71ac44f5294c0035a95a35bdfd",
      "tree": "c049ecb19e1002a40ae75236f87871bf53fa150f",
      "parents": [
        "d5cdcaaf9a8800900f60dd7f8894f12cbcab11d3"
      ],
      "author": {
        "name": "linden",
        "email": "bestxmg@gmail.com",
        "time": "Sat Sep 26 18:41:53 2026 +1200"
      },
      "committer": {
        "name": "David Malcolm",
        "email": "dmalcolm@redhat.com",
        "time": "Mon Oct 05 14:43:13 2026 -0400"
      },
      "message": "text-art: add array2::set overload taking an rvalue element\n\narray2::set only took a const reference, so a std::move at the call site, as in canvas::paint, still copy-assigned. Add an overload that move-assigns, so the std::move takes effect for element types that own a std::vector, such as styled_unichar.\n\ngcc/ChangeLog:\n\n\t* text-art/types.h (text_art::array2::set): Add overload taking\n\telement_t \u0026\u0026.\n\nSigned-off-by: linden \u003cbestxmg@gmail.com\u003e\n"
    },
    {
      "commit": "d5cdcaaf9a8800900f60dd7f8894f12cbcab11d3",
      "tree": "f734a41c26b7141981b5fec23fb02eca39b1e2c1",
      "parents": [
        "b3b1b80477c25b6ed74c2c5d3a54a6d7a15c9a09"
      ],
      "author": {
        "name": "linden",
        "email": "bestxmg@gmail.com",
        "time": "Sat Sep 26 18:41:52 2026 +1200"
      },
      "committer": {
        "name": "David Malcolm",
        "email": "dmalcolm@redhat.com",
        "time": "Mon Oct 05 14:43:13 2026 -0400"
      },
      "message": "gcc, analyzer: drop std::move calls that have no effect\n\nThree call sites wrap an argument in std::move where no move can\nactually happen: the callee only takes a const reference, or there is\nno std::string::operator+\u003d(std::string\u0026\u0026).  Remove the std::move in\neach; behaviour is unchanged.\n\ngcc/ChangeLog:\n\t* xml.cc (node_with_children::add_text): Remove no-op std::move.\n\ngcc/analyzer/ChangeLog:\n\t* access-diagram.cc (access_diagram_impl::make_warning_string):\n\tRemove no-op std::move.\n\t* engine.cc (exploded_graph::unwind_from_exception): Likewise.\n\nSigned-off-by: linden \u003cbestxmg@gmail.com\u003e\n"
    },
    {
      "commit": "b3b1b80477c25b6ed74c2c5d3a54a6d7a15c9a09",
      "tree": "30bffeb193dae1d4abf6bc5a6d2c8b339cc9cf04",
      "parents": [
        "89cb8a767dc507e10fe7b86a245109f0052aa9fa"
      ],
      "author": {
        "name": "linden",
        "email": "bestxmg@gmail.com",
        "time": "Sun Sep 06 16:00:32 2026 +1200"
      },
      "committer": {
        "name": "David Malcolm",
        "email": "dmalcolm@redhat.com",
        "time": "Mon Oct 05 14:43:13 2026 -0400"
      },
      "message": "diagnostics: take HTML tag names as const char * in source-printing\n\nto_text/to_html\u0027s tag-name helpers took std::string by value though\nevery call site passes a literal; to_text\u0027s bodies are no-ops, so this\nbuilt a string only to discard it. Take these as const char* instead:\nto_text\u0027s path becomes free, to_html\u0027s cost is unchanged, and the\nnow-meaningless std::move wrappers on that side are dropped.\n\ngcc/ChangeLog:\n\t* diagnostics/source-printing.cc (to_text::push_html_tag)\n\t(to_text::push_html_tag_with_class, to_text::add_html_tag_with_class)\n\t(to_html::push_html_tag, to_html::push_html_tag_with_class)\n\t(to_html::add_html_tag_with_class): Take tag/class names as\n\tconst char * rather than std::string by value.\n\nSigned-off-by: linden \u003cbestxmg@gmail.com\u003e\n"
    },
    {
      "commit": "89cb8a767dc507e10fe7b86a245109f0052aa9fa",
      "tree": "212ca71d7e0b6811fc4e7798f7c0f8210ab07f18",
      "parents": [
        "75321514b9193f8f2b54623e903238ea62c50f8f"
      ],
      "author": {
        "name": "linden",
        "email": "bestxmg@gmail.com",
        "time": "Sun Sep 06 15:58:46 2026 +1200"
      },
      "committer": {
        "name": "David Malcolm",
        "email": "dmalcolm@redhat.com",
        "time": "Mon Oct 05 14:43:12 2026 -0400"
      },
      "message": "analyzer, diagnostics: add missing std::move for by-value sinks\n\nThree spots take an argument clearly meant to be sunk (by-value\nparameters, an rvalue-reference ctor param) but copy it instead of\nmoving. Move in all three: infinite_loop\u0027s ctor, and\nadd_labelled_value\u0027s \u0027id\u0027/\u0027label\u0027 parameters, matching the sibling\n\u0027value\u0027 parameter which was already moved.\n\ngcc/analyzer/ChangeLog:\n\t* infinite-loop.cc (infinite_loop::infinite_loop): std::move eedges\n\tinto m_eedge_vec.\n\ngcc/ChangeLog:\n\t* diagnostics/html-sink.cc (add_labelled_value): std::move \u0027id\u0027 and \u0027label\u0027 into\n\tthe xml::printer calls.\n\nSigned-off-by: linden \u003cbestxmg@gmail.com\u003e\n"
    },
    {
      "commit": "75321514b9193f8f2b54623e903238ea62c50f8f",
      "tree": "bb0669f1f1aa7262582507e25c21a438786c4c92",
      "parents": [
        "f9b60a8bd7569f59534a42d1383c1f66a37542cf"
      ],
      "author": {
        "name": "linden",
        "email": "bestxmg@gmail.com",
        "time": "Sun Sep 06 15:58:20 2026 +1200"
      },
      "committer": {
        "name": "David Malcolm",
        "email": "dmalcolm@redhat.com",
        "time": "Mon Oct 05 14:43:12 2026 -0400"
      },
      "message": "analyzer: avoid deep-copying program_state when creating an exploded_node\n\nget_or_create_node deep-copied program_state twice when creating a\nnode, even though the source was discarded right after; program_state\nowns its region_model via pointer, so each copy cloned it. Add move\nsupport to program_state, point_and_state and exploded_node, cutting a\nnew node\u0027s cost from three deep-copies to one. The pruned_state copy\nused as the hash-map key stays, since the merge loop needs it stable\nwhile mutating the key.\n\ngcc/analyzer/ChangeLog:\n\t* program-state.h (program_state::operator\u003d): Declare move-assignment\n\toverload.\n\t* program-state.cc (program_state::operator\u003d): Implement it: steal\n\tthe region_model and sm_state_map pointers, leaving the source empty.\n\t* exploded-graph.h (point_and_state::point_and_state): Add a move\n\tctor; explicitly default the copy ctor.\n\t(point_and_state::set_state): Add a program_state\u0026\u0026 overload.\n\t(exploded_node::exploded_node): Declare a (point_and_state\u0026\u0026, int)\n\toverload.\n\t* engine.cc (exploded_node::exploded_node): Implement the\n\t(point_and_state\u0026\u0026, int) overload; check m_ps rather than the\n\targument in the existing overload\u0027s assertion.\n\t(exploded_graph::get_or_create_node): Move the merged state into\n\tpoint_and_state::set_state; move the point_and_state into the new\n\texploded_node; log node-\u003eget_state () instead of the moved-from ps.\n\nSigned-off-by: linden \u003cbestxmg@gmail.com\u003e\n"
    },
    {
      "commit": "f9b60a8bd7569f59534a42d1383c1f66a37542cf",
      "tree": "dbd86fc0975270c6c8b43e1155bf6ca7281c0626",
      "parents": [
        "a71504c4120daff6fc2ae198fc588e1ce5acaa93"
      ],
      "author": {
        "name": "Martin Jambor",
        "email": "mjambor@suse.cz",
        "time": "Mon Oct 05 16:59:12 2026 +0200"
      },
      "committer": {
        "name": "Martin Jambor",
        "email": "jamborm@gcc.gnu.org",
        "time": "Mon Oct 05 17:00:08 2026 +0200"
      },
      "message": "ipa-cp: Adjust PGO IPA-CP cloning heuristics\n\nWith profile-feedback, the run-times used for opportunity evaluations\nis not currently scaled to the total measured run time of the\nprogram/compilation unit, which is an obvious mistake.  This patch\nadds such scaling by run-time which is however itself also scaled down\nso that the resulting scores rougly fall in line with the scores on\nhot loops we get using guessed profile.\n\ngcc/ChangeLog:\n\n2026-05-15  Martin Jambor  \u003cmjambor@suse.cz\u003e\n\n\t* ipa-cp.cc (overall_scaled_runtime): New.\n\t(good_cloning_opportunity_p): Scale PGO evaluations by\n\toverall_scaled_runtime.\n\t(ipcp_propagate_stage): Calculate also overall_scaled_runtime and\n\tprint it and unscaled time.\n\t(ipa_cp_cc_finalize): Set overall_scaled_runtime to zero.\n\t* params.opt (ipa-cp-profile-runtime-scaling): New.\n\t* doc/params.texi (ipa-cp-profile-runtime-scaling): New.\n"
    },
    {
      "commit": "a71504c4120daff6fc2ae198fc588e1ce5acaa93",
      "tree": "3d821202c9a3d908ea2887b8ba51a4a54533478f",
      "parents": [
        "c3aaf80822f28e4517e783422473a3785f94d619"
      ],
      "author": {
        "name": "John David Anglin",
        "email": "danglin@gcc.gnu.org",
        "time": "Mon Oct 05 10:32:04 2026 -0400"
      },
      "committer": {
        "name": "John David Anglin",
        "email": "danglin@gcc.gnu.org",
        "time": "Mon Oct 05 10:32:04 2026 -0400"
      },
      "message": "hppa: Fix hppa_rtx_costs_shadd_p to handle subregs in inner operands\n\nFixes gcc.target/hppa/shadd-4.c on hppa64-hp-hpux11.11.\n\n2026-10-04  John David Anglin  \u003cdanglin@gcc.gnu.org\u003e\n\ngcc/ChangeLog:\n\n\t* config/pa/pa.cc (hppa_rtx_costs_shadd_p): Strip SUBREG wrappers\n\tfrom inner operands when checking if X represents a possible\n\tshadd pattern.\n"
    },
    {
      "commit": "c3aaf80822f28e4517e783422473a3785f94d619",
      "tree": "2a86da04bd19634d46ab57cd9671f32f0ec2d2d8",
      "parents": [
        "4b690722a0585c50f033deec5637760a671c72f0"
      ],
      "author": {
        "name": "Alfie Richards",
        "email": "alfie.richards@arm.com",
        "time": "Fri Oct 02 15:06:04 2026 +0000"
      },
      "committer": {
        "name": "Alfie Richards",
        "email": "alfie.richards@arm.com",
        "time": "Mon Oct 05 13:10:51 2026 +0000"
      },
      "message": "aarch64: Add --param\u003daarch64-autovec-mode\n\nAllows forcing the autovec mode for testing and debugging purposes.\n\ngcc/ChangeLog:\n\n\t* config/aarch64/aarch64.cc (aarch64_autovectorize_vector_modes):\n\tAll logic to only use aarch64-autovec-mode when specified.\n\t* config/aarch64/aarch64.opt: Add --param\u003daarch64-autovec-mode.\n\t* doc/params.texi: Document  --param\u003daarch64-autovec-mode.\n"
    },
    {
      "commit": "4b690722a0585c50f033deec5637760a671c72f0",
      "tree": "e10825a1a28c3150bf855f1f9e120ea2f9afcba4",
      "parents": [
        "787d1973b7e5fef891ad2ba66fe6489ff6fcbafd"
      ],
      "author": {
        "name": "Jonathan Wakely",
        "email": "jwakely@redhat.com",
        "time": "Tue May 05 21:34:41 2026 +0100"
      },
      "committer": {
        "name": "Jonathan Wakely",
        "email": "redi@gcc.gnu.org",
        "time": "Mon Oct 05 13:53:04 2026 +0100"
      },
      "message": "libstdc++: Use proper hash function for atomic::wait state [PR115955]\n\nThe table of __waitable_state objects used by std::atomic::wait is\nindexed based on the address of the atomic being waited on, but the\nindex is computed using `(uintptr_t(addr) \u003e\u003e 2) % 16`. This has very\nnon-uniform properties and results in high numbers of collisions.\n\nThis commit uses an efficient hash function that mixes the high bits of\nthe address and cascades them to the low bits. This should have better\ndistribution and avoid the pathological case where every atomic object\ncollides on the same wait state.\n\nThe hash function also uses a per-process seed initialized on first use.\nThat seed comes from arc4random if available, or std::random_device.\nIf neither works, no seed is used.\n\nBefore this change collisions in the wait state table meant that\ndistinct atomic objects would share the same proxy wait state and a\nnotify_one() call would wake threads waiting on completely separate\natomic objects. When the number of threads was smaller than the core\ncount, the false sharing \"only\" resulted in other CPUs spinning on the\nunrelated atomics that were woken even though their atomic didn\u0027t change\nvalue. This wastes cycles, but for some naive benchmarks it looks like a\nwin because all the atomics are kept hot and are acting like a spinlock\nwith no back off, never actually doing a futex wait before being\ninterrupted again. When the number of threads exceeds the available\ncores the old code has disastrous behaviour, because there aren\u0027t enough\ncores to service the thundering herd that wakes up on every notify. The\nCPU usage for a single notify scales with the number of waiters and\nperformance drops when every waiter has to wait to get scheduled on a\nCPU.\n\nAfter this change collisions in the wait state are less likely, avoiding\nthe pathological case where every object collides with every other\nbecause they\u0027ve been intentionally separated by 64 bytes to sit on\nseparate cachelines. Now waking one waiter doesn\u0027t affect every other\nwaiter, so most waiters stay blocked in the kernel. The CPU usage for a\nsingle notify is flat and the latency of a notify is approximately just\nthe system call overhead for the futex wake.\n\nFor a benchmark with 17 threads doing wait/notify on std::atomic\u003cbool\u003e,\nmy laptop sees a 30x reduction in CPU time, and almost 2x reduction in\nlatency per-notify. The numbers are obviously very workload dependent,\nbut the code is now behaving as it was always intended to.\n\nFor non-proxy waits (e.g. std::atomic\u003cint\u003e where the atomic is used as a\nfutex directly) the benefit of this change is much smaller. Even when\nthere is a collision on the wait state, that\u0027s only used for contention\ntracking not as the futex object that the real wait/wake syscalls act\non. But the change doesn\u0027t hurt the non-proxy case, so is still a\nsignificant improvement overall.\n\nlibstdc++-v3/ChangeLog:\n\n\tPR libstdc++/115955\n\t* src/c++20/atomic.cc (__waitable_state::_S_state_for): Use a\n\treal hash function to map addresses to waitable states.\n\nReviewed-by: Tomasz Kamiński \u003ctkaminsk@redhat.com\u003e\n"
    }
  ],
  "next": "787d1973b7e5fef891ad2ba66fe6489ff6fcbafd"
}
