)]}'
{
  "id": "88e11c9ce3d1d77f2b1b4f7b2e5471f3f7604772",
  "repo": "llvm-project",
  "revision": "refs/heads/rust-revert-fastisel",
  "path": "llvm/test/CodeGen/AMDGPU/schedule-barrier.mir"
}