AMDGPU: Adjust the chain for loads writing to the HI part of a register.

Summary:
  For these loads that write to the HI part of a register, we should chain them to the op that writes to the LO part
of the register to maintain the appropriate order.

Reviewers:
  rampitec, arsenm

Differential Revision:
  https://reviews.llvm.org/D56454

llvm-svn: 351379
2 files changed
tree: c172c355db1e948ea75cc614e393e197f3721273
  1. clang/
  2. clang-tools-extra/
  3. compiler-rt/
  4. debuginfo-tests/
  5. libclc/
  6. libcxx/
  7. libcxxabi/
  8. libunwind/
  9. lld/
  10. lldb/
  11. llgo/
  12. llvm/
  13. openmp/
  14. parallel-libs/
  15. polly/
  16. pstl/
  17. .arcconfig
  18. README.md
README.md

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